FoMR: Using Machine Learning to Design Next Generation Caches and Data Prefetchers

虽然普通公众通常关注处理器时钟速度作为微处理器性能的衡量标准，但内存系统往往会限制系统的整体性能，特别是对于当今数据匮乏的计算用途而言。这个项目探索了一种设计计算机硬件的变革性方法，特别是记忆系统：这种方法不是仅仅依靠人类的洞察力和直觉，而是采用并利用机器学习技术，以更彻底和更系统的方式探索更大、更丰富的设计空间。这种方法使硬件设计人员能够考虑比目前可能的更复杂的设计因素。该项目包括两个阶段。第一阶段寻求显著改善传统存储系统组件，如缓存替换策略和数据预取器，这些组件已经进行了大量研究，但现在利用机器学习进行创新的时机已经成熟。第二阶段考虑了复杂的因素，如关键程度、这些组件之间的相互作用以及新存储技术的使用。这一奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

While the general public typically focuses on processor clock speed as a measure of microprocessor performance, it is often the memory system that limits overall system performance, particularly for today's data-hungry uses of computing. This project explores a transformative approach to designing computer hardware, particularly the memory system: Rather than rely solely on human insight and intuition, this approach adapts and leverages machine learning techniques to explore larger and richer design spaces in a more thorough and systematic manner. This approach enables hardware designers to consider more complex design factors than are currently possible. This project consists of two phases. The first phase seeks to dramatically improve traditional memory system components, such as cache replacement policies and data prefetchers, which have been heavily studied but are now ripe for innovation with the use of machine learning. The second phase considers complicating factors such as criticality, the interaction among these components, and the use of new memory technologies.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.