Optimization of 100 Gb/s Short Range Wireless Transceivers under Processing-Energy Constraints

处理能量约束下 100 Gb/s 短距离无线收发器的优化

• 批准号: 237403541
• 负责人: Professor Dr.-Ing. Gerd Ascheid
• 金额: --
• 依托单位: Lehrstuhl für Integrierte Systeme der Signalverarbeitung (ISS)
• 依托单位国家: 德国
• 项目类别: Priority Programmes
• 财政年份: 2013
• 资助国家: 德国
• 起止时间: 2012-12-31 至 2019-12-31
• 项目状态: 已结题
• 来源: https://gepris.dfg.de/gepris/projekt/237403541?language=en
• 关键词: Optimization; 100; Gb; Short; Range

Subject of this project is the scientific investigation of novel concepts for wireless short range transceivers operating at carrier frequencies of 60 GHz or 120 GHz and with a bandwidth between 1 and 10 GHz. A particular processing-energy per information bit leads to a power consumption increasing disproportionally high with the data rate. For data rates in the order of 100 Gb/s the power consumed by the transceiver will become a severe issue. Therefore, in this project transceivers will be optimized for maximum throughput especially under constraints on the total consumed energy, i.e. on transmit- and on processing-energy, per information bit and, thus, on the power consumed for a given information bit rate. In order to achieve the objectives, we will study suitable radio-frequency (RF) architectures and transmission schemes jointly with energy-efficient architectures and their implementation in a real cross layer approach. This inevitably requires a power consumption based design space exploration. Major challenges are in the approaches to achieve transmission rates in the order of 100 Gb/s and in an analog/digital partitioning of the signal processing tasks that supports the data rates but stays within acceptable limits for the consumed energy per information bit.The key objectives of this project thus lie in the design of innovative RF, mixed-signal, and digital signal processing architectures to achieve high power efficiency, bandwidth efficiency and implementation efficiency for ultra-high data rates. To achieve the main objectives a number of key problems has to be researched. This includes, in particular, realization of high modulation orders, many-antenna transmission, partitioning into analog and digital signal processing, digitally adjusted/switched analog processing, and energy efficient silicon implementation. For all concepts their impact on the throughput and their contribution to the total energy consumption will be key parameters. Thus, energy/power estimation and budgeting is a further key research topic of this project. After researching system architectures for 60 GHz and power-efficient implementation of the digital signal processing in the first phase, in the second phase critical components will be implemented on silicon and their performance will be compared to the behavior, which was determined by theoretical analysis and by simulation. Further, power-optimized system architectures for the 120 GHz range (and beyond) will be studied and this work will also be used to validate the power consumption based design space exploration method, developed in the first phase.

该项目的主题是对工作在60 GHz或120 GHz载波频率，带宽在1至10 GHz之间的无线短距离收发器的新概念进行科学研究。每个信息位的特定处理能量导致功耗随数据速率不成比例地增加。对于100 Gb/s量级的数据速率，收发器的功耗将成为一个严重的问题。因此，在本项目中，收发器将优化为最大吞吐量，特别是在总消耗能量的限制下，即每个信息比特的传输和处理能量，以及给定信息比特率所消耗的功率。为了实现目标，我们将研究合适的射频（RF）架构和传输方案与节能架构及其在真正的跨层方法中的实现。这不可避免地需要基于功耗的设计空间探索。主要的挑战是实现100 Gb/s数量级的传输速率的方法，以及支持数据速率的信号处理任务的模拟/数字分区，但保持在每个信息比特消耗的能量可接受的范围内。因此，该项目的关键目标在于设计创新的射频、混合信号和数字信号处理架构，以实现超高数据速率的高功率效率、带宽效率和实现效率。为了实现主要目标，必须研究一些关键问题。这包括，特别是，实现高调制阶数，多天线传输，划分为模拟和数字信号处理，数字调整/切换模拟处理，和节能硅实现。对于所有概念，它们对吞吐量的影响和对总能耗的贡献将是关键参数。因此，能源/功率估算与预算是本课题进一步的重点研究课题。在第一阶段研究了60 GHz的系统架构和数字信号处理的节能实现之后，第二阶段将在硅上实现关键组件，并将其性能与行为进行比较，通过理论分析和仿真确定。此外，还将研究120 GHz（及以上）频段的功耗优化系统架构，该工作还将用于验证第一阶段开发的基于功耗的设计空间探索方法。