PFI-RP: Advanced Nanopositioning Stages for High-Throughput Semiconductor Metrology

这一创新-研究伙伴关系(PFI-RP)项目的更广泛影响/商业潜力是，通过以经济可行的价位提供前所未有的定位性能，实现对半导体晶圆的高通量检查。工艺控制，如半导体晶圆缺陷的检测，目前是半导体制造成品率的瓶颈。市场对电子芯片的更高性能、更多功能、更小尺寸和更低价格的需求，继续推动该行业朝着更小的线宽(目前为7 nm节点)和更复杂的芯片设计方向发展。这导致每个晶片的缺陷数量越来越多，这影响了芯片功能，从而影响了整体制造产量。虽然希望在制造过程中更频繁地检查和评估更多缺陷以实现高成品率，但当前缓慢的检查速度导致了吞吐量瓶颈。通过该项目开发的技术旨在克服检查吞吐量和产量之间的权衡。该项目的社会影响最终将以更便宜的电子产品(处理器、内存、传感器等)的形式出现。这将扩大对计算机、移动设备、汽车、机器人、自动化和物联网(IoT)设备等的访问。拟议的项目旨在开发纳米定位技术，以实现几毫米的运动范围、高速、更小的建立时间、纳米精度和低发热量--这些规格以前被认为在紧凑和成本效益高的封装中是不切实际的。该项目将通过在并联运动设计、非线性弯曲力学和结构动力学方面的创新，利用新颖的电磁执行器架构，开发满足半导体行业需求的严格运动要求的纳米定位工作台。这些先进的纳米定位阶段将被整合到半导体工艺控制设备中，以快速将晶片从一个缺陷转移到另一个缺陷。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。

The broader impact/commercial potential of this Partnerships for Innovation – Research Partnerships (PFI-RP) project is to enable high-throughput inspection of semiconductor wafers via unprecedented positioning performance at an economically viable price-point. Process control, such as inspection of defects on semiconductor wafers, is currently a bottleneck for semiconductor manufacturing yield. Market demand for higher performance, increased functionality, smaller size, and lower prices in electronic chips has continued the push the industry towards smaller linewidths (currently at the 7 nm node) and more complex chip designs. This has resulted in an increasingly large number of defects per wafer, which impacts the chip functionality and therefore overall manufacturing yield. While it is desirable to inspect and evaluate more defects more frequently during the fabrication process to achieve high yield, the current slow rates of inspection lead to a throughput bottleneck. The technology developed via this project aims to overcome this tradeoff between inspection throughput and yield. The societal impact of this project will ultimately be in the form of cheaper electronics (processors, memory, sensors, etc.) that will broaden access to computers, mobile devices, automobiles, robotics, automation, and Internet of Things (IoT) devices, among others. The proposed project aims to develop nano-positioning technology that achieves a range of several millimeters of motion, high speed, smaller settling time, nanometric accuracy, and low heat generation – specifications previously considered impractical in a compact and cost-effective package. This project will develop nano-positioning stages that meet stringent motion specifications motivated by the needs of the semiconductor industry through innovations in parallel kinematic design, non-linear flexure mechanics, and structural dynamics with novel electromagnetic actuator architectures. These advanced nano-positioning stages will be incorporated within semiconductor process control equipment to rapidly move wafers from one defect to another.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.