Collaborative Research: CNS Core: Small: IMPERIAL: In-Memory Processing Enhanced Racetrack Inspired by Accessing Laterally

合作研究：CNS Core：Small：IMPERIAL：受横向访问启发的内存处理增强赛道

• 批准号: 2133340
• 负责人: Sanjukta Bhanja
• 金额: $ 18万
• 依托单位: University of South Florida
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2021
• 资助国家: 美国
• 起止时间: 2021-10-01 至 2024-09-30
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2133340&HistoricalAwards=false
• 关键词: Collaborative; Research; CNS; Core; Small

Next generation mobile systems require memory and storage with unprecedented density and access speed that meets strict power/energy and reliability constraints. Moreover, these systems can benefit from application specific acceleration on data intensive workloads. For instance, Internet of Things (IoT) devices are tasked with acquiring, storing, and processing vast amounts of acquired information. Edge systems may slightly relax power/energy constraints, but can benefit from acceleration of machine learning, security, or other application specific tasks while maintaining quality of service on tasks from simultaneous disparate users. This project explores applying a new and understudied emerging memory technology called domain-wall memory (DWM) and its application to the needs of mobile and edge devices. DWM has properties that can be exploited to increase storage density, access speed, and to relieve the memory access bottleneck that exists in modern systems. The PIs will leverage their expertise to create a cross-layer design approach spanning the device/circuit- through system-level to develop a novel cross-DWM (XDWM) memory architecture with lateral read and write access capabilities. These innovations will revolutionize storage and processing for next generation mobile and edge devices by providing synergistic data storage and efficient processing-in-memory (PIM) with hooks for reliability. A cross-layer evaluation methodology will be adopted to cover prototype fabrication, device-level characterization, architecture-level simulation, and full system integration and emulation to explore the PIM. The transformative nature of this research is a disruptive new memory system that is dense, reliable, energy-efficient, ultra low latency with compute capability that can revolutionize the storage and processing capabilities of next generation computing systems. Such systems particularly include IoT, mobile and secure shared use edge systems but also apply to high performance computing and cloud systems. Further impacts of the proposed research include the integration of various education and advocacy activities based on the resources available to the two PIs such as (i) outreach for local K-12 students through Pitt's “Investing Now” summer school and USF's “Engineering Day” and Expo, where Engineering solutions are showcased to approximately 10,000 K-12 students/parents/teachers. (ii) inclusivity: Both PIs have a track record of including Under-represented Minority (URM) students.. They will continue to focus on URM representation in their team. (iii) curriculum: course integration of the research at both sites.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

下一代移动系统需要内存和存储具有前所未有的密度和访问速度，以满足严格的功率/能量和可靠性限制。此外，这些系统可以从数据密集型工作负载上的特定于应用程序的加速中获益。例如，物联网（IoT）设备的任务是获取、存储和处理大量已获取的信息。边缘系统可能会稍微放松功率/能量限制，但可以从机器学习、安全性或其他特定应用任务的加速中受益，同时保持来自同时不同用户的任务的服务质量。该项目探索了一种新的、尚未得到充分研究的新兴存储技术——域墙存储器（DWM）及其在移动和边缘设备需求中的应用。DWM具有可以用来提高存储密度、访问速度和缓解现代系统中存在的内存访问瓶颈的特性。pi将利用他们的专业知识创建跨器件/电路到系统级的跨层设计方法，以开发具有横向读写访问能力的新型跨dwm （XDWM）内存体系结构。这些创新将通过提供协同数据存储和高效内存处理（PIM）以及可靠性挂钩，彻底改变下一代移动和边缘设备的存储和处理方式。将采用跨层评估方法来涵盖原型制造、器件级表征、架构级仿真以及完整的系统集成和仿真，以探索PIM。这项研究的变革性质是一种具有颠覆性的新存储系统，它具有密集，可靠，节能，超低延迟的计算能力，可以彻底改变下一代计算系统的存储和处理能力。这些系统特别包括物联网、移动和安全共享使用边缘系统，但也适用于高性能计算和云系统。拟议研究的进一步影响包括基于两个pi可用资源的各种教育和宣传活动的整合，例如(i)通过皮特大学的“现在投资”暑期学校和南佛罗里达大学的“工程日”和博览会向当地K-12学生推广工程解决方案，其中约有10,000名K-12学生/家长/教师。（ii）包容性：两所私立学校都有招收代表性不足的少数民族学生的记录。他们将继续关注URM在他们团队中的代表。（三）课程设置：两地研究的课程整合。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

项目成果

Pinning Fault Mode Modeling for DWM Shifting

• DOI: 10.1109/tcsii.2022.3161594
• 发表时间: 2022-03
• 期刊: IEEE Transactions on Circuits and Systems II: Express Briefs
• 作者: Kawsher A. Roxy;Stephen Longofono;Sébastien Olliver;S. Bhanja;A. R. U. O. Florida;U. Pittsburgh

CORUSCANT: Fast Efficient Processing-in-Racetrack Memories

• DOI: 10.1109/micro56248.2022.00060
• 发表时间: 2022-10
• 期刊: 2022 55th IEEE/ACM International Symposium on Microarchitecture (MICRO)
• 作者: S. Ollivier;Stephen Longofono;Prayash Dutta;J. Hu;S. Bhanja;A. Jones

A Multi-Domain Magneto Tunnel Junction for Racetrack Nanowire Strips

• DOI: 10.1109/tnano.2023.3298920
• 发表时间: 2022-05
• 期刊: IEEE Transactions on Nanotechnology
• 影响因子: 2.4
• 作者: Prayash Dutta;Albert Lee;Kang L. Wang;A. Jones;S. Bhanja

Toward Comprehensive Shifting Fault Tolerance for Domain-Wall Memories with PIETT

利用 PIETT 实现域壁存储器的全面移位容错

• DOI: 10.1109/tc.2022.3188206
• 发表时间: 2022
• 期刊: IEEE Transactions on Computers
• 影响因子: 3.7
• 作者: Ollivier, Sebastien;Longofono, Stephen;Dutta, Prayash;Hu, Jingtong;Bhanja, Sanjukta;Jones, Alex K.
• 通讯作者: Jones, Alex K.

XDWM: A 2D Domain Wall Memory

XDWM：2D 畴壁存储器

• DOI: 10.1109/tnano.2022.3158889
• 发表时间: 2022
• 期刊: IEEE Transactions on Nanotechnology
• 影响因子: 2.4
• 作者: Hoque, Arifa;Jones, Alex K.;Bhanja, Sanjukta
• 通讯作者: Bhanja, Sanjukta