Collaborative Research: SaTC: CORE: Medium: Systematic Detection Of and Defenses Against Next-Generation Microarchitectural Attacks

在不不经意地将敏感数据泄露给错误方的情况下进行计算是很困难的。更糟糕的是，处理器的设计显著地加剧了这个问题。具体来说，处理器是由性能优化（称为微体系结构）组成的。研究表明，精明的攻击者可以操纵微架构来泄露敏感数据。这个项目的新颖之处在于设计了从安全角度分析微架构的方法和工具：捕捉其泄露敏感数据的可能性，并向硬件设计人员和软件编写人员提供可操作的反馈，以帮助避免在硬件设计时和软件运行时泄露敏感数据。该项目更广泛的影响和重要性在于开发一种构建高效、安全处理器的方法。即性能和安全性并不相互排斥的情况。该项目分为两个协同推进部分。推力1，分析，开发了一些技术，用于理解和简洁地描述微架构组件（在其开发的各个阶段）在集成到更大的设计中时的信息泄漏潜力。推进2，强化，开发了使用上述特征（规范）的技术，例如，由推进1生成，以派生软件缓解。在这两个重点中，一个主要目标是开发可以自动化的技术。相应地，到项目结束时，目标是开发和传播一个完整的端到端原型框架，该框架可以与传统硬件设计流程一起使用，以便1)使硬件工程师能够进行安全效率协同设计，2)在先前分析的微架构上运行程序时保护程序。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

It is difficult to compute on sensitive data without inadvertently leaking it to the wrong party. Making matters worse, processor design significantly exacerbates this problem. Specifically, processors are made up of performance optimizations (called microarchitecture). Research has shown how a savvy attacker can manipulate microarchitecture to leak sensitive data. This project’s novelties are to design methodologies and tools for analyzing microarchitecture through a security lens: capturing its potential to leak sensitive data and providing actionable feedback to hardware designers and software writers to help avoid sensitive data breaches at both hardware design time and software run time. The project’s broader impact and importance is to develop a means for building efficient, secure processors—i.e., those where performance and security are not mutually exclusive.The project is broken into two synergistic thrusts. Thrust 1, Analysis, develops techniques for understanding and succinctly characterizing the information leakage potential of microarchitectural components (at various stages in their development) when they are integrated into a larger design. Thrust 2, Hardening, develops techniques for using said characterizations (specifications), e.g., generated by thrust 1, to derive software mitigations. In both thrusts, a major goal is to develop techniques that can be automated. Correspondingly, by the end of the project, the goal is to develop and disseminate a complete end-to-end prototype framework that can be used alongside traditional hardware design flows to 1) enable security-efficiency co-design by hardware engineers and 2) protect programs when run on previously analyzed microarchitectures.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.