Collaborative Research: SaTC: CORE: Small: SOCIAL: System-on-Chip Information Flow Validation under Asynchronous Events

点击翻译按钮获取中文摘要

We live in an era where smart, connected computing devices pervade many critical applications, including transportation systems, industrial automation, health and biomedical systems, etc. Naturally, these devices create, process, and exchange significant sensitive information. Unauthorized or malicious access to these assets can result in disastrous consequences, including loss of human life in the case of health monitoring systems. The goal of this project is to create a comprehensive infrastructure for information flow validation, i.e., ensuring that sensitive assets in modern System-on-Chip designs cannot be accessed or corrupted by an unauthorized or untrusted agent. The ove r-arching goal is to develop a scientific foundation and a comprehensive automated framework of integrated tools for systematically addressing the spectrum of challenges in information flow validation. The research objectives are tightly integrated into teaching and outreach activities, in the form of new curriculum development, organizing security competitions in premier conferences, recruitment of female and underrepresented minority students, and involving high-school graduates in research. The project has three technical objectives. The first objective is to develop a core foundation for information flow analysis that accounts for real-world complexities. In particular, many hard-to-detect real-world information flow violations result from interruptions of functional flow by a variety of asynchronous events, to subvert the integrity of hardware assets. The project addresses this critical issue by incorporating new, innovative approaches to specify, analyze, and integrate the role of asynchronous events and hardware-firmware interaction within the foundation. The second objective is to develop a comprehensive automated framework of integrated tools for systematically addressing the spectrum of challenges in information flow validation. The project addresses this goal through a combination of dynamic and formal analysis techniques that draw inspiration from advances in formal methods, testing, and machine learning. Third, the project targets smooth integration of the analysis infrastructure with industrial validation flows.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.