Summer School/Workshop on Asynchronous Logic: 2022

随着特征尺寸的不断缩小和设计复杂度的不断提高，采用全局同步方法设计大规模数字系统的传统方法面临着许多挑战。提议的暑期学校的愿景是教育研究人员和实践者进行自定时或异步设计-一种放弃全局时钟信号而支持本地同步的替代策略。这样做消除了扩展挑战，更重要的是，允许VLSI系统自然地适应工作负载和应用特性的最大可变来源。自定时方法在许多不同的领域都有好处，包括通过利用与工作负载相关的优化来降低功耗和提高吞吐量。这个暑期学校是由一些最新的电子设计自动化工具开发的，这些工具支持异步逻辑。这些工具的开发得到了DARPA电子复兴计划（ERI）的支持，并且这些工具目前在十几个组织（包括学术和工业）中使用。这些工具将用于支持异步设计的统一和一致的方法。该奖项反映了美国国家科学基金会的法定使命，并通过使用基金会的知识价值和更广泛的影响审查标准进行评估，被认为值得支持。

With shrinking feature size and increasing design complexity, the traditional approach of designing large scale digital systems using a global synchronization approach is facing a number of challenges. The vision of the proposed summer school is to educate researchers and practitioners in self-timed or asynchronous design—an alternative strategy that abandons the global clock signal in favor of local synchronization. Doing so eliminates the scaling challenge, and more importantly, permits VLSI system to adapt naturally to the largest source of variability—in workload and application characteristics. The self-timed approach has demonstrated benefits in a number of different areas, including reduced power consumption and increased throughput by exploiting workload-dependent optimizations.This summer school is enabled by some very recent developments in new electronic design automation tools that have native support for asynchronous logic. The development of these tools was supported by the DARPA Electronics Resurgence Initiative (ERI), and the tools are currently in use at over a dozen organizations (both academic and industrial). These tools will be used to support a unified and coherent approach to asynchronous design.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.