Summer School/Workshop on Asynchronous Logic: 2022

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With shrinking feature size and increasing design complexity, the traditional approach of designing large scale digital systems using a global synchronization approach is facing a number of challenges. The vision of the proposed summer school is to educate researchers and practitioners in self-timed or asynchronous design—an alternative strategy that abandons the global clock signal in favor of local synchronization. Doing so eliminates the scaling challenge, and more importantly, permits VLSI system to adapt naturally to the largest source of variability—in workload and application characteristics. The self-timed approach has demonstrated benefits in a number of different areas, including reduced power consumption and increased throughput by exploiting workload-dependent optimizations.This summer school is enabled by some very recent developments in new electronic design automation tools that have native support for asynchronous logic. The development of these tools was supported by the DARPA Electronics Resurgence Initiative (ERI), and the tools are currently in use at over a dozen organizations (both academic and industrial). These tools will be used to support a unified and coherent approach to asynchronous design.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.