CCF-BSF:SHF: Small: Timing Validation for Asyncronous Circuits

CCF-BSF:SHF：小：异步电路的时序验证

• 批准号: 1724992
• 负责人: Rajit Manohar
• 金额: $ 35万
• 依托单位: Yale University
• 依托单位国家: 美国
• 项目类别: Standard Grant
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-01-01 至 2020-07-31
• 项目状态: 已结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=1724992&HistoricalAwards=false
• 关键词: CCF; BSF; SHF; Small; Timing

Enabled by research and development in advanced materials, nano-manufacturing, and digital computation, low-cost, high-performance, and low-power electronic components have yielded smart-phones, wireless connectivity, high-throughput networks, inexpensive data centers, to just name a few aspects of our modern digital economy. However, as the current technology approaches limits set by the laws of physics, gains in performance and power efficiency are no longer realizable through conventional techniques. It is critical that a diverse group of students be trained in unconventional approaches, so that they can take new ideas to practice as part of the semiconductor industry and continue the phenomenal growth of the past decades known as the Moore's law. Asynchronous circuits and systems design, to be pursued in this project, is one such unconventional approach being studied as a way to improve computational efficiency. The project also collaborates with the Binational Science Foundation (BSF) of Israel to leverage complementary research expertise.Automated timing validation is a critical component in physical realization of a digital circuit. Timing validation ensures that the physical implementation of the circuit is consistent with the intent of the designer, in spite of the uncertainties and constraints introduced by the manufacturing process. Two components are necessary for timing validation: a mathematical foundation, and software that realizes the validation process by implementing the mathematics. The goal of this effort is to develop these two components for the timing validation of asynchronous circuits. The project brings expertise from two different disciplines to bear on this effort: (i) asynchronous circuit design and implementation, and (ii) the theory of asynchronous distributed systems. The project adapts the concept of potential causality from the distributed systems literature to the context of asynchronous circuits. The fusion of insights and techniques from the two disciplines promises to facilitate better design of fast and energy-efficient circuits, as well as improving the techniques for validating and verifying the correctness of systems built from them.

通过先进材料、纳米制造和数字计算的研究和开发，低成本、高性能和低功耗的电子元件已经产生了智能手机、无线连接、高吞吐量网络、廉价的数据中心，这只是我们现代数字经济的几个方面。然而，随着当前技术接近由物理定律设定的极限，性能和功率效率的增益不再可通过常规技术实现。至关重要的是，一个多元化的学生群体接受非传统方法的培训，使他们能够将新的想法作为半导体行业的一部分付诸实践，并继续过去几十年的惊人增长，即摩尔定律。异步电路和系统设计，将在这个项目中进行，是一个这样的非传统的方法正在研究的一种方法，以提高计算效率。该项目还与以色列两国科学基金会（BSF）合作，利用互补的研究专长。自动时序验证是数字电路物理实现的关键组成部分。时序验证确保电路的物理实现与设计者的意图一致，尽管制造过程引入了不确定性和约束。定时验证需要两个组件：数学基础和通过实现数学来实现验证过程的软件。这项工作的目标是开发这两个组件的异步电路的时序验证。 该项目带来了来自两个不同学科的专业知识来承担这项工作：（i）异步电路设计和实现，以及（ii）异步分布式系统的理论。该项目适应的概念，潜在的因果关系，从分布式系统的文学异步电路的上下文中。这两个学科的见解和技术的融合有望促进更好地设计快速和节能的电路，并改进验证和验证系统正确性的技术。