NSF Convergence Accelerator Track I: Building a Sustainable, Innovative Ecosystem for Microchip Manufacturing

微电子技术是一种无处不在的解决方案，涵盖从通信和计算到传感和成像的各种功能，适用于从洗衣机到汽车和大型数据中心的各种产品。晶体管尺寸调整降低了能耗，同时提高了速度和功能。为了保持业绩的可伸缩性：i)迭代的技术变化是不够的，ii)供应链在劳动力质量、材料关键程度和制造废水方面的可持续性没有固有的可伸缩性矢量。这个国家的经济风险从来没有这么大过，也很少像现在这样依赖于一项特定的技术进步。晶体管/芯片缩放的结束需要一种新的芯片/封装缩放范例。这项研究计划将为微电子封装供应链创建一个正式的行业/政府/学术基础设施，称为微电子制造可持续发展计划(MMSP)，将提供一致的政策建议、技术目标和时间表，以及芯片/封装规模方面的教育和劳动力发展产品；并将制作一种新的大带宽芯片封装的原型。MMSP将由六个融合团队(技术、劳动力、制造、供应链、材料关键程度、路线图)领导，以实现：(A)用于扩展微电子的创新封装原型；(B)材料、加工、设计和可持续性扩展的行业技术路线图；(C)关于材料关键程度、工艺废水和摇篮的重大挑战可持续性研究；以及(D)用于信息和汽车行业的IC芯片的严重能源消耗的数据库，以及(D)用于指导封装创新的材料特性、工艺工具和劳动力技能的数据库。MMSP将：(I)用创新的原型为行业研发提供信息；(Ii)采用灵活的继续教育方法，通过对美国微电子行业人力资本的教育和培训，实现多样性、公平性、包容性和可获取性；(Iii)培养对K-12科学、技术、工程和数学的认识，以支持下一代工程师和技术人员的关键渠道；(Iv)与历史上的黑人学院和大学以及西班牙裔服务机构接触；(V)为创建技术和教育路线图建立不同的工作组。拟议的项目还将包括三个主要的技术组成部分。(1)电子-光子封装(EPP)研究：一个价值4000亿美元的半导体行业供应链将如何从芯片规模过渡到新的封装规模平台？将应用从纯电子学过渡到光子学的专家团队能否共同创建通用词汇表、设计基础设施和供应链调整？全球电子/光子业致力于为微电子供应链构建具有可持续发展指标的EPP路线图。第一阶段的研究将包括创新的EPP设计的可行性演示，以将包I/O扩展到1 PB/秒的数据传输速率。(2)可持续发展属性和边界：可持续发展是大批量制造的关键“小星球前沿”。(3)劳动力敏捷继续教育：技术转型给以下方面带来风险：(I)公司的业务和可持续性主张；(Ii)员工职业生涯；以及(Iii)现有技术兼容性。将学习科学与制造创新相结合，将使研究发现转化为新的包装设计/测试教育计划(第一阶段概述课程)。

Microelectronics technology is the pervasive solution across functions ranging from communications and computation to sensing and imaging, for products ranging from washing machines to automobiles and mega-data centers. Transistor dimensional scaling has reduced energy consumption and increased speed and functionality, simultaneously. To maintain performance scaling: i) iterative technology change is insufficient, and ii) supply chain sustainability in terms of workforce quality, materials criticality, and manufacturing effluent has no inherent scaling vector. Economic risk for the nation has never been so large, and rarely been so dependent on a particular technology evolution. The end of transistor/chip scaling requires a new chip/package scaling paradigm. This research program will create a formal industry/government/academic infrastructure called the Microelectronics Manufacturing Sustainability Program (MMSP) for the microelectronics packaging supply chain that will deliver consensus policy recommendations, technology goals and timelines, as well as education and workforce development products in chip/package scaling; and will prototype a new massive-bandwidth chip package. MMSP will be led by six Convergence Teams (Technology, Workforce, Manufacturing, Supply Chain, Materials Criticality, Roadmap) to realize:(a) Innovative packaging prototypes for scaling microelectronics (b) an industry Technology Roadmap for materials, processing, design, and sustainability scaling(c) Grand Challenge sustainability studies of materials criticality, process effluent and cradle-to grave energy consumption in IC chips for information and automotive industries, and (d) Databases of materials properties, process tools, and workforce skills to guide packaging innovation. MMSP will: (i) inform industry R&D with innovative prototypes; (ii) embrace Diversity, Equity, Inclusion and Accessibility with education and training for human capital of the US microelectronics industry, using an agile continuous education methodology; (iii) create K-12 Science, Technology, Engineering and Mathematics awareness to support a critical pipeline for the next-generation of engineers and technicians; (iv) engage with Historically Black Colleges and Universities and Hispanic Serving Institutions; and (v) build diverse working groups for the creation of technology and education roadmaps. There will also be three major technical components to the proposed project. (1) Electronic-Photonic Packaging (EPP) Research: How will a $400B semiconductor industry supply chain transition from chip-scaling to a new package-scaling platform? Can teams of experts who bridge applications from pure electronics to photonics jointly create a common glossary, design infrastructure, and supply chain alignment? MMSP is driven by the Integrated Photonics Systems Roadmap-International (IPSR-I) Consortium: a forum to construct a common manufacturing platform and establish a learning curve to identify performance/cost benefits of research and development Grand Challenges. Global electronic/photonic industries have committed to construction of an EPP Roadmap for the microelectronics supply chain with sustainability metrics. Phase 1 research will include feasibility demonstration of innovative EPP designs for scaling package I/O to 1 Petabit/second data transfer rates. (2) Sustainability Attributes & Boundaries: Sustainability is the critical ‘small planet frontier’ for high volume manufacturing. Phase 1 white paper studies will guide EPP Roadmap tasks to assess how materials, workforce, life-cycle, and energy become supply chain limiting resources; the Roadmap releases will anticipate disruptions and specify trade-offs in engineering, economic, social, and policy constraints with research, design, and manufacturing Process-Based Cost Models. (3) Workforce Agile Continuous Education: Technology transitions introduce risks to: (i) firms’ business and sustainability propositions; (ii) worker careers; and (iii) incumbent technology compatibility. Converging Learning Science with Manufacturing Innovation will enable research discovery to translate into a new Design for Packaging/Test education program (Phase 1 outlines curriculum). MIT’s Lab for Education and Application Prototypes (LEAP) will train 2-year and 4-year college students and upskill incumbent workers by its extant blended instruction strategy: (a) Massive Open Online Courses (conceptual learning); (b) Virtual Reality sims (fortify conceptual learning, pre-train in procedural skills); (c) hands-on labs (fortify procedural/conceptual learning) in on-site bootcamps.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.