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NSF Convergence Accelerator Track I: FUTUR-IC: A Sustainable Microchip Manufacturing Alliance

NSF Convergence Accelerator Track I: FUTUR-IC: A Sustainable Microchip Manufacturing Alliance
NSF 融合加速器轨道 I:FUTUR-IC:可持续微芯片制造联盟
批准号:
2345076
负责人:
Anuradha Agarwal
金额:
$500.0万
依托单位国家:
美国
项目类别:
Cooperative Agreement
财政年份:
2023
资助国家:
美国
项目状态:
未结题
起止时间:
2023-12-15 至 2026-11-30

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中文摘要
翻译
人类生存和微芯片利益之间的平衡正受到无情和不可持续的电子消费欲望的严重挑战。future - ic全球可持续微芯片制造联盟创建了自一致的3D技术、生态和劳动力解决方案,以维持半导体制造和信息系统行业的持续进步,这些行业面临着晶体管尺寸、环境足迹和劳动力准备就绪的限制。好的商业需要基于对人类、地球和利润的影响的多维决策。微芯片行业的前沿限制是:1)技术/利润:为下一代应用(如AI, 6G, LiDAR等)增强的微芯片功能不能再仅仅依赖于缩小晶体管的尺寸;2)生态/地球:产品生命周期对环境的净零影响对地球上的生命至关重要;3)劳动力/人员:需要具有绿色素养的新型STEM劳动力的领导。并行工程解决方案有望建立一个共同的学习曲线,为半导体行业未来40年的发展提供动力。future - ic将:1)造福消费者:改善生活,到2050年实现零环境影响;2)培养未来的创新者,加强全方位的劳动力培训:扩大微芯片技术的绿色素养,从K-Gray招聘和保留;3)增加DEIA:支持领导、性别、种族和文化背景的多样性,以确保研究获得广泛的视角,以塑造未来的技术轨迹;4)改变全球微芯片供应链:在流程和设计的环境和社会影响的约束下,提供连贯的技术发展。技术:晶体管的尺寸缩放接近原子尺寸,成本/能量/带宽密度要求挑战基础物理学。新兴的近期可持续解决方案是用于通信的光子学和用于计算的电子学,因此future - ic正在研究(i)可持续电子光子封装(EPP)的创新,其i /O在净零过程包络内为1 Pb/s,作为其驱动因素,以获得低材料消耗,可靠,超低功耗和低插入损耗耦合,高带宽光纤到微芯片封装,具有平面,非平面和可插拔的光学连接;(ii) UR4(升级、减少、再利用、回收、维修)的设计,以尽量减少电子废物;(iii)在芯片制造和包装过程中测量和去除PFAS,以减少有毒排放物。生态:行业需要一个基于共识的分析和可量化的生命周期评估(LCA)工具包来指导路线图预测。future - ic凭借其综合和跨学科的贡献,将在产品生命周期中建立分析能力,以获得有史以来第一次全面,快速,环境,社会和当前,数据驱动的足迹和手印价值数字。劳动力:微芯片劳动力需求由能力、绿色素养和创新能力主导。future - ic将创建一支绿色素养熟练的创新劳动力队伍,接受STEM、半导体技术和可持续性等混合学习内容的教育,利用教学设计和前沿学习科学,提供有效的长期再培训和技能提升课程。该奖项反映了美国国家科学基金会的法定使命,并通过使用基金会的知识价值和更广泛的影响审查标准进行评估,被认为值得支持。
英文摘要
The balance between human existence and microchip benefits is being severely challenged by a relentless and unsustainable appetite for electronics consumption. The FUTUR-IC Global Alliance for Sustainable Microchip Manufacturing creates self-consistent 3D technology, ecology, and workforce solutions to sustain the continued progress of the semiconductor manufacturing and the information systems industry, which is confronted with limits to transistor size, to its environmental footprint, and to its workforce pipeline readiness. Good business requires multi-dimensional decisions based on the consequences for people, planet, and profits. Frontier constraints in the microchip industry are: 1) Technology/Profits: Enhanced microchip functionality for next generation applications such as AI, 6G, LiDAR etc. can no longer depend solely on shrinking the dimensions of a transistor; 2) Ecology/Planet: Net Zero environmental impact for a product life cycle is critical to life on earth; 3) Workforce/People: Leadership from a new green-literate STEM workforce is required. Concurrently engineered solutions are expected to build a common learning curve to power the next 40 years of progress for the semiconductor industry.FUTUR-IC will: 1) Benefit consumers: Enhance life while targeting Net Zero environmental impact by 2050; 2) Foster future innovators and enhance full-spectrum workforce training: Extend green literacy in microchip technologies to recruit and retain from K-Gray; 3) Increase DEIA: Support diversity in leadership, gender, ethnicity, and cultural backgrounds, to ensure that research is informed by a broad range of perspectives to shape future technology trajectories; 4) Transform the global microchip supply chain: Provide coherent technology evolution within the constraints of the environmental and social impacts of processes and designs. Technology: Dimensional scaling of transistors is approaching atomic dimensions, with cost/energy/bandwidth-density requirements challenging fundamental physics. The emerging near-term sustainable solution is photonics for communication and electronics for computation, and hence FUTUR-IC is investigating (i) innovation in sustainable Electronic-Photonic Package (EPP) with I/O 1 Pb/s within a Net Zero process envelope, as its driver, to obtain low materials-consumption, reliable, ultralow power, and low insertion loss coupling, of high bandwidth fiber optics to the microchip package with planar, non-planar, and pluggable optical connection, (ii) Design for UR4 (upgrade, reduce, reuse, recycle, repair) to minimize e-waste; and (iii) PFAS measurement and removal from chip fabrication and packaging processes to reduce toxic effluent. Ecology: The industry needs a consensus-based analytical and quantifiable Life Cycle Assessment (LCA) toolkit to guide roadmap projections. FUTUR-IC with its integrative and interdisciplinary contributions will build the analytical capability in the product lifecycle to obtain the first-ever comprehensive, rapid, environmental, social, and current, data-driven figures of merit with footprints and handprints. Workforce: Microchip workforce needs are led by capacity, green-literacy, and capability for innovation. FUTUR-IC will create a green-literacy-skilled innovative workforce educated with blended learning content in STEM, semiconductor technology, and sustainability, using instructional design and leading-edge learning science to deliver a curriculum that is effective for perennial reskilling and upskilling.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.
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NSF Convergence Accelerator Track I: Building a Sustainable, Innovative Ecosystem for Microchip Manufacturing
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