NSF Convergence Accelerator Track I: FUTUR-IC: A Sustainable Microchip Manufacturing Alliance

NSF 融合加速器轨道 I：FUTUR-IC：可持续微芯片制造联盟

• 批准号: 2345076
• 负责人: Anuradha Agarwal
• 金额: $ 500万
• 依托单位: Massachusetts Institute of Technology
• 依托单位国家: 美国
• 项目类别: Cooperative Agreement
• 财政年份: 2023
• 资助国家: 美国
• 起止时间: 2023-12-15 至 2026-11-30
• 项目状态: 未结题
• 来源: https://www.nsf.gov/awardsearch/showAward?AWD_ID=2345076&HistoricalAwards=false
• 关键词: NSF; Convergence; Accelerator; Track; FUTUR

The balance between human existence and microchip benefits is being severely challenged by a relentless and unsustainable appetite for electronics consumption. The FUTUR-IC Global Alliance for Sustainable Microchip Manufacturing creates self-consistent 3D technology, ecology, and workforce solutions to sustain the continued progress of the semiconductor manufacturing and the information systems industry, which is confronted with limits to transistor size, to its environmental footprint, and to its workforce pipeline readiness. Good business requires multi-dimensional decisions based on the consequences for people, planet, and profits. Frontier constraints in the microchip industry are: 1) Technology/Profits: Enhanced microchip functionality for next generation applications such as AI, 6G, LiDAR etc. can no longer depend solely on shrinking the dimensions of a transistor; 2) Ecology/Planet: Net Zero environmental impact for a product life cycle is critical to life on earth; 3) Workforce/People: Leadership from a new green-literate STEM workforce is required. Concurrently engineered solutions are expected to build a common learning curve to power the next 40 years of progress for the semiconductor industry.FUTUR-IC will: 1) Benefit consumers: Enhance life while targeting Net Zero environmental impact by 2050; 2) Foster future innovators and enhance full-spectrum workforce training: Extend green literacy in microchip technologies to recruit and retain from K-Gray; 3) Increase DEIA: Support diversity in leadership, gender, ethnicity, and cultural backgrounds, to ensure that research is informed by a broad range of perspectives to shape future technology trajectories; 4) Transform the global microchip supply chain: Provide coherent technology evolution within the constraints of the environmental and social impacts of processes and designs. Technology: Dimensional scaling of transistors is approaching atomic dimensions, with cost/energy/bandwidth-density requirements challenging fundamental physics. The emerging near-term sustainable solution is photonics for communication and electronics for computation, and hence FUTUR-IC is investigating (i) innovation in sustainable Electronic-Photonic Package (EPP) with I/O 1 Pb/s within a Net Zero process envelope, as its driver, to obtain low materials-consumption, reliable, ultralow power, and low insertion loss coupling, of high bandwidth fiber optics to the microchip package with planar, non-planar, and pluggable optical connection, (ii) Design for UR4 (upgrade, reduce, reuse, recycle, repair) to minimize e-waste; and (iii) PFAS measurement and removal from chip fabrication and packaging processes to reduce toxic effluent. Ecology: The industry needs a consensus-based analytical and quantifiable Life Cycle Assessment (LCA) toolkit to guide roadmap projections. FUTUR-IC with its integrative and interdisciplinary contributions will build the analytical capability in the product lifecycle to obtain the first-ever comprehensive, rapid, environmental, social, and current, data-driven figures of merit with footprints and handprints. Workforce: Microchip workforce needs are led by capacity, green-literacy, and capability for innovation. FUTUR-IC will create a green-literacy-skilled innovative workforce educated with blended learning content in STEM, semiconductor technology, and sustainability, using instructional design and leading-edge learning science to deliver a curriculum that is effective for perennial reskilling and upskilling.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.

人类生存和微芯片利益之间的平衡正受到对电子产品消费的无情和不可持续的胃口的严重挑战。未来-IC全球可持续微芯片制造联盟创造了自我一致的3D技术、生态和劳动力解决方案，以维持半导体制造和信息系统行业的持续进步，该行业面临着晶体管尺寸、环境足迹和劳动力流水线准备的限制。良好的业务需要基于对人、地球和利润的后果的多维决策。微芯片行业的前沿限制是：1)技术/利润：AI、6G、LiDAR等下一代应用的增强微芯片功能不再仅仅依赖于缩小晶体管的尺寸；2)生态/星球：对产品生命周期的净零环境影响对地球上的生命至关重要；3)劳动力/人员：需要来自新的具有绿色文化的STEM劳动力的领导。同时设计的解决方案预计将建立共同的学习曲线，为半导体行业未来40年的进步提供动力。FUTUR-IC将：1)使消费者受益：改善生活，同时目标是到2050年实现净零环境影响；2)培养未来的创新者，并加强全方位的劳动力培训：扩大微芯片技术的绿色素养，从K-Gray招聘和留住人才；3)增加Deia：支持领导层、性别、种族和文化背景的多样性，以确保研究从广泛的角度提供信息，以塑造未来的技术轨迹；4)改变全球微芯片供应链：在工艺和设计的环境和社会影响的约束下提供一致的技术发展。技术：晶体管的尺寸缩放正在接近原子尺寸，成本/能量/带宽密度要求对基础物理学提出了挑战。新出现的可持续的解决方案是用于通信的光子学和用于计算的电子学，因此未来集成电路正在研究(I)以净零工艺包络内的I/O 1Pb/S为驱动的可持续电子光子封装的创新，以获得低材料消耗、可靠、超低功率和低插入损耗的耦合，将高带宽光纤与具有平面、非平面和可插拔的光连接的微芯片封装相结合，(Ii)针对UR4(升级、减少、再利用、回收、修复)的设计以最大限度地减少电子垃圾；以及(Iii)全氟辛烷磺酸的测量和从芯片制造和封装过程中去除，以减少有毒废水。生态：该行业需要一个基于共识的分析性和可量化的生命周期评估(LCA)工具包来指导路线图预测。未来-IC凭借其综合和跨学科的贡献，将在产品生命周期中建立分析能力，以获得有史以来第一个全面、快速、环保、社会和最新的、具有足迹和手印的数据驱动的价值系数。劳动力：微芯片的劳动力需求以产能、绿色素养和创新能力为主导。未来-IC将培养一支绿色识字技能的创新劳动力队伍，接受STEM、半导体技术和可持续发展方面的混合学习内容教育，使用教学设计和尖端学习科学来提供有效的课程，以实现常年的重新技能和提升技能。该奖项反映了NSF的法定使命，并通过使用基金会的智力优势和更广泛的影响审查标准进行评估，被认为值得支持。