Collaborative Research: DESC: Type I: SEEDED: Sustainability-aware Reliable and Reusable AI Hardware Design

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Deep Neural Network (DNN) accelerators are hardware designed for compute-intensive applications like deep learning algorithms. DNN accelerators are quickly becoming common place as artificial intelligence (AI) and machine learning are used in many electronic systems today. Some of these include safety-critical applications such as automotive, healthcare, and aerospace. However, many of the high-precision DNN accelerators consume a lot of energy, making their use limited for energy-constrained devices. A popular solution to this issue has been hardware approximation, where an approximate design of the accelerator is considered to be sufficient for purposes of energy efficiency. The use of hardware approximation can make the outcome up to 3X more vulnerable to permanent faults compared to their accurate counterparts. Permanent faults usually lead to discarding in the post-fabrication phase. Such permanent faults can also appear in the post-deployment phase when the chip is in use. Both cases are environmentally costly and not sustainable. The main objective of this research is to develop a new sustainability-aware design flow for approximate deep neural networks - DNNs that can prolong their lifetime by enabling reuse and self-repair while also optimizing performance and sustainability metrics.A sustainability-aware design flow in the early design phases and augmenting approximate hardware-based DNN accelerators (AxDNNs) with lightweight fault detection and self-repair capability allows their reuse and re-purpose with operating capability close to the original baseline accuracy. Motivated by this goal, this project aims to transform the state-of-the-art in designing and deploying AxDNNs with three proposed research objectives: (i) investigating methods for designing reliable and sustainable AxDNNs with the help of a novel and efficient neural architecture search methods; (ii) investigating methods for post-fabrication and post-deployment fault mitigation in AxDNNs with the help of bypass circuitry, approximate retraining, hybrid built-in-self-test, and self-repair through weight swapping; and, (iii) developing a simulation and field programmable gate arrays (FPGAs) demonstration platform to evaluate and demonstrate the effectiveness of the resulting AxDNNs compared against user-defined first-order metrics and novel sustainability-aware dimensions. The project outcomes (i.e., new theories, tools, codes, benchmarks, and case studies) will be publicly made available to the broader machine learning and cyber-physical system (CPS) communities through open-source software and peer-reviewed publications. In addition, the project outcomes will create a new curriculum and hands-on laboratory exercises for computer and electrical engineering undergraduate and graduate courses.This award reflects NSF's statutory mission and has been deemed worthy of support through evaluation using the Foundation's intellectual merit and broader impacts review criteria.