A Novel Power Reduction Technique Using Error-resilient Deep Neural Networks for STT-MRAM Based Energy-efficient Brain-inspired Processor Design

今年，我们继续研究自适应量化算法，并从算法和电路架构方面验证了其对AI芯片性能的影响。一种新颖的自适应低功耗量化技术，并系统地验证了其从算法到工业物联网应用硬件模块的有效性，涵盖自动驾驶汽车的精确导航和利用深度神经网络的准确分类。所提出的量化方法将从浮点到定点二进制的自适应转换函数与自适应基数点确定函数合并，确保边缘AI模块的定点输入的足够分辨率和最小误差损失。此外，提出了一种混合有符号卷积模块与无符号分治乘法器的架构，以提高基于STT-MRAM的人工智能加速器的功能多样性和能源效率。所提出的乘法器框架支持不同的乘法模式，大大增强了乘法器在下一代AI加速器中的通用性。

This year, we continued our study on the adaptive quantization algorithm and validated its influence on AI chip performance in terms of algorithms and circuit architecture. A novel adaptive and low-power quantization technique and systematically validates its effectiveness from the algorithm to the hardware module for industrial IoT applications, covering precise navigation for autonomous vehicles and accurate classification utilizing deep neural networks. The proposed quantization method merges an adaptive conversion function from floating-point to fixed-point binaries with an adaptive radix-point determination function, ensuring adequate resolution and minimal error loss of the fixed-point inputs to the edge AI modules. In addition, a hybrid signed convolution module with the architecture of an unsigned divide-and-conquer multiplier is proposed to improve the functional diversity and energy efficiency of artificial intelligence accelerators based on STT-MRAM. The proposed multiplier framework enables different multiplication modes, considerably enhancing the multiplier's versatility for next-generation AI accelerators.