Combining Topology Synthesis and Physical Design for Wavelength-Routed Optical Networks-on-Chip (WRONoC) — Design Automation Using Physical Layout Templates

将拓扑综合和物理设计相结合，实现波长路由片上光网络 (WRONoC) – 使用物理布局模板的设计自动化

• 批准号: 439798838
• 负责人: Professor Dr.-Ing. Ulf Schlichtmann
• 金额: --
• 依托单位: Lehrstuhl für Entwurfsautomatisierung (EDA)
• 依托单位国家: 德国
• 项目类别: Research Grants
• 财政年份: 2020
• 资助国家: 德国
• 起止时间: 2019-12-31 至 2023-12-31
• 项目状态: 已结题
• 来源: https://gepris.dfg.de/gepris/projekt/439798838?language=en
• 关键词: Combining; Topology; Synthesis; Physical; Design

Optical networks-on-chip (ONoC) is an appealing next-generation architecture for on-chip communication in multiprocessor systems-on-chip. Compared to the traditional NoC platforms that use electrical interconnects, ONoCs use optical waveguides to accommodate and transmit optical signals of different wavelengths, and show advantages in high bandwidth, low latency, and distance-independent power consumption. This proposal focuses on a specific family of ONoCs, namely wavelength-routed ONoCs (WRONoCs), which are renowned for supporting all-to-all simultaneous and collision-free data transmission. The state-of-the-art WRONoC design flow is separated into two sequential steps: logic synthesis and physical design, in between of which there is an optimization gap. In the present project, we propose to develop an design automation approach to synthesize and optimize concurrently both the logic topology and the physical layout of a WRONoC design. To reduce the design space to a manageable complexity, we propose to use physical layout templates as additional inputs, which will confine the placement and routing options to a collection of predefined placeholders. To achieve this goal, we will first research the design space of the physical layout templates, and then develop a design automation approach to customize a physical layout template for any given communication graph and layout constraints in an automated manner; integrate the customized template to the optical plane; and synthesize and optimize a complete WRONoC design based on the integrated template. We have tested some manually designed physical layout templates with a prototyped optimization tool and achieved promising results. Thus we are confident that the present project will enable more cost- and energy-efficient WRONoC designs and contribute to the scaling up of this emerging technology.

片上光网络（ONoC）是下一代多处理器片上系统的片上通信架构。与传统的采用电互连的片上网络平台相比，ONoC采用光波导来容纳和传输不同波长的光信号，在高带宽、低延迟和与距离无关的功耗方面表现出优势。该提案侧重于特定的ONoC家族，即波长路由的ONoC（WRONoC），其以支持所有对所有的同时和无冲突的数据传输而闻名。最先进的WRONoC设计流程分为两个连续的步骤：逻辑综合和物理设计，在这两者之间存在一个优化的差距。在本项目中，我们建议开发一种设计自动化方法，同时合成和优化的逻辑拓扑结构和物理布局的WRONoC设计。为了将设计空间减少到可管理的复杂性，我们建议使用物理布局模板作为额外的输入，这将把布局和布线选项限制在预定义的占位符集合中。为了实现这一目标，我们将首先研究物理布局模板的设计空间，然后开发一种设计自动化方法，以自动化的方式为任何给定的通信图和布局约束定制物理布局模板;将定制模板集成到光学平面;并基于集成模板合成和优化完整的WRONoC设计。我们已经测试了一些手动设计的物理布局模板与原型优化工具，并取得了可喜的成果。因此，我们相信，目前的项目将实现更具成本效益和能源效益的WRONoC设计，并有助于扩大这一新兴技术的规模。