Automization and Efficiency of Hardware Design by means of Voice Communication

通过语音通信实现硬件设计的自动化和高效化

• 批准号: 14580396
• 负责人: KUTSUWA Toshiro
• 金额: $ 1.79万
• 依托单位: Osaka Institute of Technology
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2002
• 资助国家: 日本
• 起止时间: 2002 至 2004
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-14580396/
• 关键词: Voice Communication; Hardware Design; Design Automation; Hardware Description Language; FPGA Design; Voice Recognition; Voice Input; Voice Recognition Application Program

It is mankind's eternal wish that every- thing can be made automatically by speaking to the computer. But in the case of the schematic input, it is very difficult to design the hardware by means of voice communication. Recently, according to the development of hardware description language and voice recognition software, hardware design may be able to be performed easily by voice communication. Then we develop a Voice Recognition Application Program (VRAP) and a graphical user interface (GUI) to develop easily the hardware design system of VHDL by means of voice communication. Furthermore, we adopt a reverse description method for the effective design and propose the effective design method for combinational circuit and sequential circuit.On the combinational circuit design, we have developed an application program VRCD_C (Voice Recognition Circuit Design of Combinational Logic), which prodeces automatically HDL description from the truth table made by voice input. For the sequential circuit, we have also developed VRCD_S (Voice Recognition Circuit Design of Sequential Logic), which produces HDL from transition table made by voice input. Forthermore, we have been trying now large scale circuit design by appling the VRCD_C,VRCD_S and system description language.

只要对着电脑说话，一切都能自动化，这是人类永恒的愿望.但在原理图输入的情况下，采用语音通信的方式进行硬件设计是非常困难的。近来，随着硬件描述语言和语音识别软件的发展，硬件设计可以通过语音通信容易地执行。在此基础上，开发了语音识别应用程序（VRAP）和图形用户界面（GUI），方便地实现了基于语音通信的VHDL硬件设计系统。在组合电路设计方面，我们开发了一个应用程序VRCD_C（Voice Recognition Circuit Design of Combinational Logic），它能从语音输入的真值表中自动生成HDL描述。对于时序电路，我们还开发了时序逻辑语音识别电路设计VRCD_S（Voice Recognition Circuit Design of Sequential Logic）。此外，我们目前正在尝试应用VRCD_C、VRCD_S和系统描述语言进行大规模电路设计。

项目成果

音声入力を利用したハードウェア設計

使用语音输入的硬件设计

• 发表时间: 2003
• 期刊: 第33回国際電子回路工業展(JPCA Show2003)アカデミック・ラボラトリ・ポスタープログラム
• 作者: 久津輪;本田;田中;荒木;原嶋
• 通讯作者: 原嶋

K.Harashima, Y.Minami, T.Kutsuwa: "Pipelined Scheduling for Dynamically Reconfigurable FPGAs"ITC-CSCC 2002 Proceedings. Vol.2. 1276-1279 (2002)

K.Harashima、Y.Minami、T.Kutsuwa：“动态可重配置 FPGA 的流水线调度”ITC-CSCC 2002 论文集。

H.Araki, K.Hoshino, T.Kutsuwa, K.Harashima: "A Re-configurable Multi Processor for an Embedded System on a FPGA and Its Programming Language"ITC-CSCC 2003 Proceedings. Vol.1. 22-25 (2003)

H.Araki、K.Hoshino、T.Kutsuwa、K.Harashima：“FPGA 上嵌入式系统的可重配置多处理器及其编程语言”ITC-CSCC 2003 年论文集。

T.Honda, H.Araki, K.Harashima, T.Kutsuwa: "Hardware Design System with the Voice Communication"ITC-CSCC 2002 Proceedings. Vol.1. 208-211 (2002)

T.Honda、H.Araki、K.Harashima、T.Kutsuwa：“具有语音通信的硬件设计系统”ITC-CSCC 2002 论文集。

荒木, 星野, 久津輪, 原嶋: "FPGAによる組込み制御を目的としたプロセッサシステムの実装と評価"電子情報通信学会論文誌C. J86-C. 5-8 (2003)

Araki、Hoshino、Kutsuwa、Harashima：“使用 FPGA 进行嵌入式控制的处理器系统的实现和评估”IEICE Transactions C. J86-C (2003)。