Study on Ultra High-bandwidth Interconnect Circuits for System-in-a-package

系统级封装超高带宽互连电路的研究

• 批准号: 16560302
• 负责人: NAKAMURA Kazuyuki
• 金额: $ 2.3万
• 依托单位: KYUSHU INSTITUTE OF TECHNOLOGY
• 依托单位国家: 日本
• 项目类别: Grant-in-Aid for Scientific Research (C)
• 财政年份: 2004
• 资助国家: 日本
• 起止时间: 2004 至 2005
• 项目状态: 已结题
• 来源: https://kaken.nii.ac.jp/en/grant/KAKENHI-PROJECT-16560302/
• 关键词: System in a Package; Interface; Serial Communication; CMOS; Coding; Band-width; Device fluctuation; Multi-value logic; コーディング; インターフェイス

In order to achieve the transfer rate that exceeds 10Gbps for the interface circuit for next generation's LSI, the high bandwidth signal transmission technology is researched and developed by introducing the analog wave modulation technology. Concretely, the volume of information that can be sent in one signal line is increased in equivalence by making the signal level multi-valued from digital transmission. As a result, it improves the data rate in the signal line, and achieves the transmission speed that exceeds the band limit of the transmission line. The circuit of four value I/O circuit was with VDEC 0.35umCMOS that had been developed in 2004. The measurement assistance circuit to confirm the success or failure of high-speed internal operation was installed in LSI. Three kinds of chips of the transmission circuit, the reception circuit, and the circuit for the test were designed in the circuit, and the layout design was done. Measurement results of experimental chips were able to confirm the operation of four value I/O circuit actually. Moreover, new multi-valued I/O circuit with the application of the coding technology was examined. As a result, it has been understood to be able to achieve the decrease of the current consumption of about 37% by using the coding technique that reduces the number of mean transitions in output signals.

为了使下一代大规模集成电路的接口电路达到超过10 Gbps的传输速率，通过引入模拟波调制技术，研究开发了高带宽信号传输技术。具体地，通过使来自数字传输的信号电平多值化，可以在一条信号线中发送的信息量等效地增加。结果，提高了信号线中的数据速率，并且实现了超过传输线的频带限制的传输速度。四值I/O电路采用2004年开发的VDEC 0.35umCMOS。在LSI中安装了用于确认高速内部操作的成功或失败的测量辅助电路。电路中设计了发射电路、接收电路和测试电路三种芯片，并进行了版图设计。实验芯片的测试结果能够真实地验证四值I/O电路的工作情况。此外，还研究了应用编码技术的新型多值I/O电路。结果，已经理解，通过使用减少输出信号中的平均转变的数量的编码技术，能够实现约37%的电流消耗的减少。

项目成果

LSI間高速通信用4値I/O回路の設計

LSI间高速通信的4值I/O电路设计

• 发表时间: 2004
• 期刊: 電子情報通信学会2004年ソサイエティ大会発表論文概要集
• 作者: 白木 良典;中村 和之
• 通讯作者: 中村 和之

Design of the 4-level I/O circuit for high-speed interconnection for LSIs

LSI高速互连的4级I/O电路设计

• 发表时间: 2004
• 期刊: 2004 Digest of IEICE Society Conference
• 作者: Yoshinori Shiraki;Kazuyuki Nakamura
• 通讯作者: Kazuyuki Nakamura

LSI間高速通信用4値I/0回路の設計

LSI间高速通信的4级I/0电路设计

• 发表时间: 2004
• 期刊: 電子情報通信学会2004年ソサイエティ大会発表論文概要集
• 作者: 白木 良典;中村 和之
• 通讯作者: 中村 和之