Study on Ultra High-bandwidth Interconnect Circuits for System-on-a-chip

点击翻译按钮获取中文摘要

According to the shrink of CMOS process technology and enlargement of the chip area, there are many serious problems in recent CMOS LSI design; such as process variations, device defects, costs for design and test. In order to avoid these problems, 2-demensional structure using functional macro blocks is considered as a promising candidate of a future LSI configuration. However the key in this structure is how to realize the high-bandwidth interconnections among these macros. In this study, both High-speed analog circuit design technology and large-scale memory design technology are employed to develop the novel interconnect technology.As a result, 1)new high-bandwidth interconnect circuits which uses 4-voltage-level was developed. It includes process variation detector to stabilize the output voltage level. 2)The test chip was also developed via VDEC to demonstrate the usefulness of this new circuit. The 4-volatege-level operation was confirmed by the measured results. 3)A quantitive analysis system using image processing for non-volatile memories was also developed to evaluate process variation.