Computer Aided Analysis of VLSI circuits based on a Partitioning Technique.
Computer Aided Analysis of VLSI circuits based on a Partitioning Technique.
批准号:
02650247
负责人:
USHIDA Akio
金额:
$0.9万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for General Scientific Research (C)
财政年份:
1990
资助国家:
日本
项目状态:
已结题
起止时间:
1990 至 1991
中文摘要
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英文摘要
We studied 3 projects in VLSI circuit analysis as follows :1. The steady-state analysis of nonlinear electronic circuits.We proposed here two efficient algorithms for getting the steady-state responses of nonlinear circuits. They are based on both time-domain and frequency-domain approaches. At the first step, a given nonlinear circuit is partitioned into the linear subnetworks and the nonlinear subnetworks with substitution sources, and their responses are solved with different techniques of the phasor method to the linear and a time-domain method to the nonlinear subnetwork, respectively. Then, the result response of the combined circuit can be calculated by an interational technique based on the harmonic balance or relaxation method. The algorithm can be easily applied to large scale circuits, efficiently.2. Transient analysis of distributed circuits with a circuit partitioning technique.We partition a given circuit into the linear distributed circuits and the nonlinear subnetworks with substitution sources. The transient waveform is calculated in such manner that both responses of the subnetworks to the sources have the same waveform at each partitioning point, where the linear subnetworks are solved by numerical inverse Laplace transformation and the nonlinear subnetworks by a numerical integration technique. The algorithm is efficiently applied to LSI circuit containing transmission lines and distributed circuits.3. A efficient curve tracing algorithm.We presented a predictor-corrector tracing curve algorithm for analysis of nonlinear circuits. It can efficiently trace the curves even if they have sharp terning points. Hence, it is used to found DC solution of nonlinear electronic circuits containing diodes and transistors.
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Kiyotaka Yamamura, Akio Ushida and Kazuo Horiuti: "Improved the effciency of interval analysis by Kevorkian's decomposition technique"" IEICE Trans. J74-A. 1142-1150 (1191)
Kiyotaka Yamamura、Akio Ushida 和 Kazuo Horiuti:“通过 Kevorkian 分解技术提高了区间分析的效率”” IEICE Trans. J74-A. 1142-1150 (1191)
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河田 淳治、牛田 明夫: "Nakhlaの方法による非線形分布定数回路の過渡解析" 電子情報通信学会非線形問題研究会資料. NLP90ー5. 31-38 (1990)
Junji Kawada、Akio Ushida:“使用 Nakhla 方法进行非线性分布常数电路的瞬态分析”IEICE NLP90-5 (1990)。
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牛田 明夫: "非線形定常振動解の求解法" システム/制御/情報(システム制御情報学会). 3. 607-614 (1990)
Akio Ushida:“非线性稳态振动解的求解方法”系统/控制/信息(系统、控制和信息工程师研究所)3. 607-614 (1990)。
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Akio Ushida: ""Steady-state analysis of nonlinear circuits based on hybrid methods"" Bull. of Faculty of Engineering. The University of Tokushima. 27. 65-79 (1990)
Akio Ushida:“基于混合方法的非线性电路稳态分析”Bull。
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山村 清隆,牛田 明夫,堀内 和夫: "Kevorkiam分解法についた区間解析の効率化について" 電子情報通信学会論文誌. J74ーA. 1142-1150 (1991)
Kiyotaka Yamamura、Akio Ushida、Kazuo Horiuchi:“使用 Kevorkiam 分解方法提高区间分析的效率”,电子、信息和通信工程师学会汇刊 J74-1150 (1991)。
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共 19 条
Computational Algorithms for Developing Circuit Simulators
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批准号:12650384
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$1.28万
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财政年份:2000
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负责人:USHIDA Akio
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依托单位:
海外基金