Design Space Exploration for Mixed-Criticality Systems on Adaptive MPSoC Platforms

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Mixed-criticality systems (MCS) are of increasing importance in numerous fields, like automotive, avionics, or medical systems, with a clear trend towards higher complexity. As a result, system implementations are evolving from single-core platforms to modern heterogeneous multi-core architectures. Of particular interest are adaptive MPSoCs, which allow tasks to be implemented not only on heterogeneous programmable units such as CPUs, GPUs, AI processing units but also as dedicated hardware units in the FPGA part of such systems. These implementation alternatives give designers additional options to fulfill the requirements of MCSs. However, current design methodologies are insufficient to deal with the enormous design space offered by these hardware platforms. This project aims to develop systematic design space exploration heuristics and guidelines for MCSs on heterogeneous and adaptive MPSoCs. The main scientific outcome will be a deeper understanding of how design decisions regarding the hardware platform and the implementation of the tasks affect the overall system’s compliance with mixed-criticality requirements. We will provide three specific contributions to the scientific community: (1) We provide a comprehensive set of models to estimate the relevant metrics of MCSs earlier in the design process. In particular, we model interdependencies between computation and communication design decisions and consider the effects of hardware design decisions on the worst-case execution time of tasks based on the concept of timing compositionality. (2) We create algorithms and design guidelines for the utilization of adaptive MPSoCs in MCSs. We provide task mapping and communication mapping strategies for different implementation alternatives, criticality modes as well as different functional modes. (3) We develop a unified approach to co-optimize hardware accelerators, communication infrastructure and the mapping of tasks onto heterogeneous processing units in MCSs. The optimization heuristics will be tailored to the requirements of MCSs implemented on adaptive MPSoCs, so that worst-case execution time and criticality requirements are explicitly considered. With these contributions, we expect to lay a strong foundation for widespread use of adaptive MPSoCs for MCSs, enabling the designers to perform a complete system optimization, despite the vast size of the initial design space.