New Design and Implementation of On Senson Compression

在这项研究中，我们提出了一种可以压缩图像信号的新型图像传感器，由于利用图像信号的并行特性在成像器平面上压缩图像单张，因此可以显着减少从成像器读出的信号量。因此，所提出的传感器可以潜在地应用于需要非常高速成像和非常高分辨率的实时成像的高像素率相机和处理系统；极高的带宽是高像素率传感器和处理系统可行性的根本限制。压缩方案采用条件补充算法；它将随时间变化的像素检测为活动像素并输出这些活动像素。研究了下面列出的两种压缩传感器架构。基于这两种方法的原型每秒运行超过 1000 帧。 (1) 像素并行架构 实现了所有必需的计算元素，即检测、速率控制和地址编码。对具有32 x 32像素的原型VLSI进行了研究。(2)列并行架构为了提高填充因子和功耗，研究了列并行架构。实现了具有 32 x 32 像素的原型 VLSI，并显示出良好的图像质量。

In this research, we propose a novel image sensor on which image signal can be compressed Since image single is compressed on the imager plane by making use of parallel nature of image signals, the amount of sigual read out from the imager can be significantly reduced. Thus, the proposed sensor can be potentially applied to high pixel rate cameras and processing systems which require very high speed imaging and very high resolution for real time imaging ; the very high bandwidth is the fundamental limitation for feasibility of those high pixel rate sensors and processing systems.Conditional replenishment algorithm is employed for the compression scheme ; it detects temporally changing pixels as active pixels and output those active pixels. Two architechtures of compression sensors listed below were investigated. The prototypes based on both approaches operate more than 1000 frames per second.(1) Pixel Parallel ArchitectureAll the required computational elements, that are detection, rate control and address encoding, were implemented. A prototype VLSI which has 32 x 32 pixels was examined.(2) Column Parallel ArchitectureIn order to improve fill factor and power dissipation, a column parallel architecture were investigated. A prototype VLSI which has 32 x 32 pixels was implemented and shows good quality of pitures.