DEVELOPMENT OF VACUUM MICRO DEVICES OPARATING AT LOW VOLTAGES WITH HIGH CURRENT DENSITY

开发一种工作在低电压、高电流密度下的场射极阵列具有重要的意义。为了降低工作电压，发射极和栅极之间的间隙和发射极曲率的半径都必须变小。为了获得高电流密度，必须增加发射极密度。下面的实验是为了开发这种新的有限元分析。(i)横向镍有限元分析的制备。由于精细的抗蚀剂图案必须以高分辨率制作，我们使用具有高数值孔径1.25的油浸透镜的光学投影光刻。镍有限元分析的制备方法有两种，一种是剥离法，另一种是利用制备的抗蚀剂图案镀镍法。结果表明，采用升射技术制备的0.3 μ m间隙的有限元分析工作电压为30V。镀镍制备的0.8mum间隙有限元分析工作在110V电压下。（二）高密度垂直硅发射体的制造。采用全息光刻技术制备了非常精细的抗蚀光栅。在全息光刻中，通过双重曝光可以得到网点图案。第二次曝光是在样品旋转90°后进行的。在2mm平方的面积内得到了直径为0.2 μ m，周期为0.5 μ m的点的图案。点的密度估计为4*10^6mm^<-2>。用CF_4等离子体刻蚀具有点状抗蚀图的硅衬底，可以得到高纵横比的硅发射极图。然而，发射器的顶部并不锋利。我们计划通过改善等离子体蚀刻条件和/或应用氧化来锐化来制造锋利的发射器。在进一步的研究中，我们认为有可能改进工作在低电压下的横向镍有限元分析的制作工艺，并建立垂直硅有限元分析的制作工艺。

It is important to develop a field emitter array (FEA) which works at low voltages with high current density. Both the gap between the emitter and the gate and the radius of the emitter curvature have to be made small in order to decrease the operating voltage. The emitter density has to be increased in order to obtain a high current density. The following experiments are performed in order to develop such novel FEAs.(i) Fabrication of lateral nickel FEAs.Since fine resist patterns have to be fabricated with high resolution, we use optical projection lithography with an oil immersion lens which has a high numerical aperture of 1.25. Nickel FEAs are fabricated by either lift-off technique or nickel plating by using the fabricated resist pattern. It is found that the FEA with a 0.3mum gap fabricated by the lift-off technique works from an operating voltage of 30V.The FEA with a 0.8mum gap fabricated by the nickel plating works from a voltage of 110V.(ii) Fabrication of high density vertical silicon emitters.Very fine resist gratings are fabricated with holographic lithography. A dots pattern can be obtained by applying a double exposure in the holographic lithography. The second exposure is done after the sample is rotated by 90ﾟ. The pattern of dots with a 0.2mum diameter and a 0.5mum period is obtained within the area of 2mm square. The density of dots is estimated as 4*10^6mm^<-2>. When a silicon substrate with the dots resist pattern is etched by CF_4 plasmas, a silicon emitter pattern with a high aspect ratio is obtained. However, the top of the emitter is not sharp. We are planing to make sharp emitters by improving the plasma etching condition and/or applying the oxidation for sharpening.In a further study we think it will be possible to improve the fabrication process of lateral nickel FEAs which work at lower voltages and establish the fabrication process of vertical silicon FEAs.