DEVELOPMENT OF VACUUM MICRO DEVICES OPARATING AT LOW VOLTAGES WITH HIGH CURRENT DENSITY

研制一种工作在低电压、高电流密度下的场发射极阵列具有重要意义。为了降低工作电压，必须减小发射极与栅极之间的间隙和发射极曲率半径。为了获得高电流密度，必须增加发射极密度。为了开发这种新型的场效应管，我们进行了以下实验：(1)横向镍场效应体的制作。由于需要制作高分辨率的抗蚀剂图形，我们使用的是具有1.25高数值孔径的油浸式透镜的光学投影光刻。利用制作的抗蚀剂图形，通过剥离技术或镀镍工艺制造镍场效应场效应晶体管。结果表明，采用剥离技术制作的间隙为0.3um的有限元分析器件的工作电压为30V，采用镀镍工艺制作的间隙为0.8um的有限元分析器件的工作电压为110V。(Ii)高密度垂直硅发射体的制作。通过在全息光刻中应用二次曝光可以获得点图案。第二次曝光是在样品旋转90ﾟ后进行的。在2 mm正方形的面积内，得到了直径为0.2um、周期为0.5um的网点图案。网点密度估计为4*10^6 mm^-2。当用CF4等离子体刻蚀具有点抗蚀剂图案的硅衬底时，可以获得高深宽比的硅发射图案。然而，发射器的顶部并不锋利。我们正在计划通过改善等离子体刻蚀条件和/或应用氧化来锐化来制造尖锐的发射器。在进一步的研究中，我们认为有可能改进工作在较低电压下的横向镍场效应场效应晶体管的制造工艺，并建立垂直硅场效应场效应晶体管的制造工艺。

It is important to develop a field emitter array (FEA) which works at low voltages with high current density. Both the gap between the emitter and the gate and the radius of the emitter curvature have to be made small in order to decrease the operating voltage. The emitter density has to be increased in order to obtain a high current density. The following experiments are performed in order to develop such novel FEAs.(i) Fabrication of lateral nickel FEAs.Since fine resist patterns have to be fabricated with high resolution, we use optical projection lithography with an oil immersion lens which has a high numerical aperture of 1.25. Nickel FEAs are fabricated by either lift-off technique or nickel plating by using the fabricated resist pattern. It is found that the FEA with a 0.3mum gap fabricated by the lift-off technique works from an operating voltage of 30V.The FEA with a 0.8mum gap fabricated by the nickel plating works from a voltage of 110V.(ii) Fabrication of high density vertical silicon emitters.Very fine resist gratings are fabricated with holographic lithography. A dots pattern can be obtained by applying a double exposure in the holographic lithography. The second exposure is done after the sample is rotated by 90ﾟ. The pattern of dots with a 0.2mum diameter and a 0.5mum period is obtained within the area of 2mm square. The density of dots is estimated as 4*10^6mm^<-2>. When a silicon substrate with the dots resist pattern is etched by CF_4 plasmas, a silicon emitter pattern with a high aspect ratio is obtained. However, the top of the emitter is not sharp. We are planing to make sharp emitters by improving the plasma etching condition and/or applying the oxidation for sharpening.In a further study we think it will be possible to improve the fabrication process of lateral nickel FEAs which work at lower voltages and establish the fabrication process of vertical silicon FEAs.