Compilers for newest architectures using the SSA form intermediate language

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In recent computer architectures, delayed branches, superscalar processing with multiple functional units, pipeline processing and internal parallel processing are heavily used. In these architectures, an efficient object code can only be generated by using compilers which optimally arranges the object code. Therefore the role of compilers is becoming more important.On the other hand, the SSA (Static Single Assignment) form, where single assignment variables are used, is proposed as a new intermediate representation in compiler back-ends. It attracts attention because it simplifies dataflow analysis and optimizing transformation in compilers. However, optimizing transformation in SSA form and connection to later phases of compilers such as register allocation and code generation is not fully investigated.In this research, we aim at developing new methods of compilers for the above problems, centering around (1) method of generating efficient code which exploits the characteristic features of newest architectures, and (2) method of optimization and code generation based on the SSA form.During the term of the project, we got the following results :(1) Generation of efficient native code for a distributed programming language on a heterogeneous distributed environment (paper 1), (2) a code scheduler based on processor description for superscalar machines (paper 6), (3) a languase processor for PDA (Personal Digital Assistant) with a highly constrainted processor (paper 5), (4) methods of transformation into the SSA form, (5) research on attribute grammars (paper 2, 3) and systematic debugging (paper 4) which is the basis of the above optimization and code generation.