Crystallographic Evaluation of Ultrathin SOI Substrates and Impurity Diffusion Modeling for Nanometer LSIs

超薄 SOI 衬底的晶体学评估和纳米 LSI 的杂质扩散建模

基本信息

  • 批准号:
    14550323
  • 负责人:
  • 金额:
    $ 2.3万
  • 依托单位:
  • 依托单位国家:
    日本
  • 项目类别:
    Grant-in-Aid for Scientific Research (C)
  • 财政年份:
    2002
  • 资助国家:
    日本
  • 起止时间:
    2002 至 2004
  • 项目状态:
    已结题

项目摘要

1.Crystalline Quality Evaluation of SOI Substrates(1)Changes of Carrier Density Distribution in SOI Substrates with AnnealingCarrier distribution changes in SOI substrates with annealing were measured. The changes depend on both Si layer thickness of SOI substrates and annealing temperature. For Si layer thicker than 1 μm, the inversion layer is generated with annealing near 1000℃ at the buried oxide interface of p-type SOI substrates, while the accumulation layer is generated at the interface of n-type SOI substrates.. For Si layer thinner than 1 μm, n-type donor is generated with annealing of 700-800℃. The donor level is below 0.03eV and the origin of the donor is considered to be due to the oxygen precipitation, i.e., so-called new donor.(2)Electrical Characteristics Evaluation of Buried Oxide (BOX) Interfacethe carrier recombination velocity of BOX interface was measured using μ-PCD method. The velocity is 500-1800 cm/s which is about 100 times larger than that for the conventional … More interface of Si and thermal silicon oxide.2.Impurity Diffusion Modeling for SOI Substrates(1)Comparison of B Diffusion Profiles in 3 kinds of Ultrathin SOI SubstratesB diffusion profiles in 3 kinds of ultra-thin SOI substrates (SIMOX, UNIBOND and ELTRAN) were compared. The diffusion depths in the SOI substrates were shallower than those in bulk Si and the depth in SIMOX is the shallowest among 3kinds of SOI substrates. These results show the crystalline quality of BOX interface and the recombination velocity of point defects at the interface is the fastest for SIMOX substrates.(2)Accuracy of Process Simulator on the Market and Diffusion ModelingFrom the B and P predeposition profiles in bulk Si and SOI substrates, diffusion parameters for simulation were extracted. Using the parameters, the drive-in diffusion profiles were simulated using the process simulator on the market and compared with experimental profiles. The experimental profiles are deeper than those simulated, which suggests that the diffusion enhancement mechanism in drive-in process should be taken in the process simulator. Less
1.(1)退火后SOI衬底载流子密度分布的变化研究了退火后SOI衬底载流子密度分布的变化。这种变化取决于SOI衬底的Si层厚度和退火温度。对于厚度大于1 μm的Si层,在p型SOI衬底埋埋氧化物界面附近1000℃退火形成反转层,而在n型SOI衬底界面形成堆积层。对于厚度小于1 μm的Si层,经700 ~ 800℃退火生成n型给体。供体水平低于0.03eV,供体的来源被认为是由于氧沉淀,即所谓的新供体。(2)埋藏氧化物(BOX)界面电特性评价采用μ-PCD法测定BOX界面载流子复合速度。速度为500 ~ 1800cm /s,是传统硅与热氧化硅界面速度的100倍左右。(1) 3种超薄SOI衬底中B扩散谱的比较比较了3种超薄SOI衬底(SIMOX、UNIBOND和ELTRAN)中的B扩散谱。SOI衬底的扩散深度较块状Si衬底浅,SIMOX衬底的扩散深度在3种SOI衬底中最浅。结果表明,在SIMOX衬底中,BOX界面的结晶质量和点缺陷的复合速度最快。(2)市场上过程模拟器的准确性和扩散建模从体硅和SOI衬底的B和P预沉积曲线中提取模拟的扩散参数。利用这些参数,利用市场上的过程模拟器模拟了车内扩散曲线,并与实验曲线进行了比较。实验剖面较模拟剖面深,说明在模拟过程中应考虑进车过程的扩散增强机制。少

项目成果

期刊论文数量(18)
专著数量(0)
科研奖励数量(0)
会议论文数量(0)
专利数量(0)
Sb Pile-up at Oxide and Si Interface during Drive-in Process after Predeposition Using Doped Oxide Source
使用掺杂氧化物源预沉积后推进过程中氧化物和硅界面处的 Sb 堆积
  • DOI:
  • 发表时间:
    2003
  • 期刊:
  • 影响因子:
    0
  • 作者:
    T.Ichino;H.Uchida;M.Ichimura;E.Arai
  • 通讯作者:
    E.Arai
Applicability of Phosphorus and Boron Diffusin Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk Si and Silicon-on-Insulaor
从预沉积提取的磷和硼扩散参数对块状硅和绝缘体上硅的驱入扩散的适用性
  • DOI:
  • 发表时间:
    2003
  • 期刊:
  • 影响因子:
    0
  • 作者:
    E.Arai;D.Iida;H.Asai;Y.Ieki;H.Uchida;M.Ichimura
  • 通讯作者:
    M.Ichimura
Applicability of Phosphorus and Boron Diffusion Parameters Extracted from Predeposition to Drive-in Diffusion for Bulk Si and Silicon-on-Insulator
从预沉积提取的磷和硼扩散参数对体硅和绝缘体上硅的驱入扩散的适用性
  • DOI:
  • 发表时间:
    2002
  • 期刊:
  • 影响因子:
    0
  • 作者:
    E.Arai;D.Iida;H.Asai;Y.Ieki;H.Uchida;M.Ichimura
  • 通讯作者:
    M.Ichimura
As and Sb diffusion profiles in thin silicon-on-insulator
薄绝缘体上硅中的 As 和 Sb 扩散分布
T.Ichino, H.Uchida, M.Ichimura, E.Arai: "Sb Pile-up at Oxide and Si Interface during Drive-in Process after Predeposition Using Doped Oxide Source"Jpn. J. Appl. Phys.. 42(掲載予定). (2003)
T.Ichino、H.Uchida、M.Ichimura、E.Arai:“使用掺杂氧化物源进行预沉积后,氧化物和硅界面处的 Sb 堆积”Jpn. J. Appl. 42 (计划)。
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    0
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ARAI Eisuke其他文献

ARAI Eisuke的其他文献

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{{ truncateString('ARAI Eisuke', 18)}}的其他基金

Modeling of Impurity Diffusion in SOI Substrates for Future LSIs
未来 LSI 的 SOI 衬底中的杂质扩散建模
  • 批准号:
    10650334
  • 财政年份:
    1998
  • 资助金额:
    $ 2.3万
  • 项目类别:
    Grant-in-Aid for Scientific Research (C)

相似海外基金

Spectroscopic and Electrical Characterization of Buried Oxide Structures
埋入氧化物结构的光谱和电学表征
  • 批准号:
    9422369
  • 财政年份:
    1995
  • 资助金额:
    $ 2.3万
  • 项目类别:
    Standard Grant
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