Research on abstract modelsof FPGAs and evaluation of hardware algorithms
Research on abstract modelsof FPGAs and evaluation of hardware algorithms
批准号:
21500016
负责人:
NAKANO Koji
金额:
$2.83万
依托单位:
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (C)
财政年份:
2009
资助国家:
日本
项目状态:
已结题
起止时间:
2009 至 2012
中文摘要
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英文摘要
We have investigated various approaches for accelerating computation using FPGAs and found a new approach that we call FDFM(Few DSP blocks and Few memory blocks) approach. Recent FPGAs have a number of embedded DSP blocks and memory blocks. The FDFM approach uses few DSP blocks and few memory blocks to install a co-processor to compute complicated computations. We have shown that RSA encryption, image pattern matching, etc. can be done very fast.
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A Graph Rewriting Approach for Converting Asynchronous ROMs into Synchronous Ones
一种将异步ROM转换为同步ROM的图重写方法
DOI:
--
发表时间:
2011
期刊:
IEICE TRANSACTIONS on Information and Systems
影响因子:
0.7
作者:
[Md. Nazrul Islam Mondal, Koji Nakano, Yasuaki Ito]
通讯作者:
Yasuaki Ito
Efficient Exhaustive Verification of the CollatzConjecture using DSP48E blocks of XilinxVirtex-5 FPGAs
使用 XilinxVirtex-5 FPGA 的 DSP48E 模块对 Collatz 猜想进行高效、详尽的验证
DOI:
--
发表时间:
2010
期刊:
影响因子:
--
作者:
[Yasuaki Ito, Koji Nakano]
通讯作者:
Koji Nakano
RSA encryption and decryption using the redundant numbersystem on the FPGA
使用FPGA上的冗余数字系统进行RSA加密和解密
DOI:
--
发表时间:
2009
期刊:
Proc.IEEE International Symposium on Parallel and Distributed Processing
影响因子:
--
作者:
[Koji Nakano, Kensuke Kawakami, Koji Shigemoto]
通讯作者:
Koji Shigemoto
CRT-based Decryption using DSP blocks on the Xilinx Virtex-6 FPGA
使用 Xilinx Virtex-6 FPGA 上的 DSP 模块进行基于 CRT 的解密
DOI:
--
发表时间:
2011
期刊:
影响因子:
--
作者:
[Bo Song, Yasuaki Ito, and Koji Nakano]
通讯作者:
and Koji Nakano
DOI:
10.1142/s0129054110007337
发表时间:
2010-06
期刊:
Int. J. Found. Comput. Sci.
影响因子:
--
作者:
[Yasuaki Ito;K. Nakano]
通讯作者:
Yasuaki Ito;K. Nakano
共 20 条
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海外基金