Automatic Synthesis Method of High-Performance, Area-Efficient and Programmable Hardware

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With the shorter time-to-market and the rising cost in SoC development, the demand for post-silicon programmability has been increasing. This research proposed a highly energy-efficient accelerator which enables post-silicon engineering change by a control patching mechanism. Then, this research proposed a patch compilation method from a given pair of an original design and a modified design. Experimental results demonstrated that the proposed accelerators offered high energy efficiency competitive to fixed-function accelerators and can achieve about 5X higher efficiency than the existing programmable accelerators.