Development of high-performance public-key cryptographic processors with tamper resistance

本研究项目开发了一种具有最先进的抗篡改能力的高性能密码处理器及其设计方法。更准确地说，我们设计了一种针对幂运算的处理器架构，这是公钥加密操作的一个组成部分，并开发了一种抗侧信道攻击的RSA处理器。此外，我们通过对开发的处理器的原型实现进行详尽的边信道攻击（即，选择消息功率/EM分析攻击和故障注入攻击）实验，证明了所开发处理器的有效性。此外，我们还开发了一个自动生成器，可以根据不同的设计规格生成RSA处理器。

This research project developed a high-performance cryptographic processor with a state-of-the-art tamper resistance capability and its design methodology. More precisely, we designed a processor architecture specified for exponentiation operation which is an integral part of public-key cryptographic operation, and developed an RSA processor highly resistant to side-channel attacks. In addition, we demonstrated the validity of the developed processor through an exhaustive set of experiments on side-channel attacks (i.e., chosen-message power/EM analysis attacks and fault injection attacks) against a prototype implementation of the developed processor. Moreover, we developed an automatic generator which generates RSA processors depending on various design specifications.