Study on Design Methodology for Reducing Both of Spatial and Temoporal Random Threshold Variation Based on Potential Control of SRAM Cell Terminals
Study on Design Methodology for Reducing Both of Spatial and Temoporal Random Threshold Variation Based on Potential Control of SRAM Cell Terminals
批准号:
23560424
负责人:
YAMAUCHI Hiroyuki
金额:
$3.33万
依托单位国家:
日本
项目类别:
Grant-in-Aid for Scientific Research (C)
财政年份:
2011
资助国家:
日本
项目状态:
已结题
起止时间:
2011 至 2013
中文摘要
本研究的目的是提供一种新的设计方法,能够检测和减少运输后现场阈值电压的空间/时间随机变化。本研究的重点是:(1)为检测和减少随机电报噪声(RTN)引起的Vt时间动态移位的可行性研究设计概念;(2)为可行性研究模拟建立物理模型;(3)SRAM单元终端偏移电位的控制。首次证明,当RTN的Vt变化分布的尾长超过随机掺杂波动(RDF)的尾长时,RTN引起的SRAM总余量调制量将达到前所未有的水平,在筛选设计中不能再忽视。
英文摘要
The purpose of this study is to provide a new design methodology enabling to detect and reduce the spatial/temporal random variations of the threshold voltage in the field after shipment. This study focuses on :(1) concept design for a feasibility study on detection and reduction of the Vt temporally dynamic shift due to Random Telegraph Noise(RTN) (2) physical modeling for the simulation for a feasibility study, and (3) control of offset potential of the terminals of SRAM cell. It has been demonstrated for the first time that the amount of the SRAM overall margin modulation due to the RTN would become unprecedented level and could no longer ignore in the screening design when the tail length of the distribution of the Vt variation for the RTN would exceed that for the random dopant fluctuation (RDF).
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A Tech nique to Circumvent V-shaped Deconvolutio n Error for Time-dependent SRAM Margin Analyses
一种避免瞬态SRAM裕度分析中V形反卷积误差的技术
DOI:
--
发表时间:
2013
期刊:
IEIE Transactions on Smart Pro cessing and Computing
影响因子:
--
作者:
[Worawit Somha, Hiroyuki Yamauchi]
通讯作者:
Hiroyuki Yamauchi
FIT 山内研究室
FIT山内实验室
DOI:
--
发表时间:
期刊:
影响因子:
--
作者:
[]
通讯作者:
DOI:
10.1109/aspdac.2012.6164968
发表时间:
2012-03
期刊:
17th Asia and South Pacific Design Automation Conference
影响因子:
--
作者:
[Meng-Fan Chang;C. Chuang;Min-Ping Chen;Lai-Fu Chen;H. Yamauchi;P. Chiu;S. Sheu]
通讯作者:
Meng-Fan Chang;C. Chuang;Min-Ping Chen;Lai-Fu Chen;H. Yamauchi;P. Chiu;S. Sheu
DOI:
--
发表时间:
2013-06
期刊:
2013 Symposium on VLSI Technology
影响因子:
--
作者:
[Chien-Fu Chen;Ting-Hao Chang;Lai-Fu Chen;Meng-Fan Chang;H. Yamauchi]
通讯作者:
Chien-Fu Chen;Ting-Hao Chang;Lai-Fu Chen;Meng-Fan Chang;H. Yamauchi
DOI:
--
发表时间:
2011-06
期刊:
2011 Symposium on VLSI Circuits - Digest of Technical Papers
影响因子:
--
作者:
[Meng-Fan Chang;Wei-Cheng Wu;Chih-Sheng Lin;P. Chiu;Ming-Bin Chen;Yen-Huei Chen;H. Lai;Zhe-Hui Lin;S. Sheu;T. Ku;H. Yamauchi]
通讯作者:
Meng-Fan Chang;Wei-Cheng Wu;Chih-Sheng Lin;P. Chiu;Ming-Bin Chen;Yen-Huei Chen;H. Lai;Zhe-Hui Lin;S. Sheu;T. Ku;H. Yamauchi
共 38 条
A studay for SRAM Terminal Biasing Scheme for Ultra-Low Operating Voltage Applications for NanoMeter Era
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批准号:19560363
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项目类别:Grant-in-Aid for Scientific Research (C)
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资助金额:$2.5万
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财政年份:2007
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负责人:YAMAUCHI Hiroyuki
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依托单位: