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Memory Access Utilizing Indirect Memory Addressing Operations

利用间接内存寻址操作进行内存访问

基本信息

批准号：
09650401
负责人：
NISHIHARA Akinori
金额：
$ 2.18万
依托单位：
TOKYO INSTITUTE OF TECHNOLOGY
依托单位国家：
日本
项目类别：
Grant-in-Aid for Scientific Research (C)
财政年份：
1997
资助国家：
日本
起止时间：
1997 至 1998
项目状态：
已结题

来源：
https://kaken.nii.ac.jp/grant/KAKENHI-PROJECT-09650401/
关键词：
Memory Access Indirect Memory Addressing Access Graph Address Allocation Code Optimization

项目摘要

In order to achieve high computational performance for recent applications, not only effective use of hardware resources such as arithmetic units and registers, but also efficient access of large memory space is very important. In many of addressing modes, we have indirect addressing mode, which points an access address by the dedicated register called "Address Register (AR)". Usually, simple AR update operations such as AR*1 are allowed to execute together with arithmetic operations in one instruction cycle. Such indirect addressing can be easily implemented at very low hardware cost, and has much advantage to realize a certain memory access such as sequencial array access and so on. Suppose we use this indirect addressing for all the memory access of a given program written in a general purpose language, object code generated by available compiler techniques often includes huge number of overhead concerned with memory access. In this research project, a processor only of indirect mem … More ory addressing mode is assumed, various code optimization methods to reduce memory access overhead are discussed. In the previous method, indirect addressing with AR*1 operations is assumed. The method represents a given memory access by a graph notation or an access graph (AG in short), and then, based on the line graph extraction algorithm, determines an efficient memory allocation of variables in a given program together with an efficient AR assignment for every memory access. In this project, extended indirect addressing models with additional AR operations are assumed, and new heuristic algorithms for code optimization are investigated.At first, an indirect addressing with additional AR *2 update operations is introduced. Since a triangle shaped graph and its chain structure (Chained Triangle Graph CTG) give efficient memory address allocations, the memory allocation method based on the CTG extraction from an AG is proposed. This method is extended for indirect addressing with AR*1, AR*2, ..., AR*k update operations. The method is based on the Chained Clique Graph (CCG) extraction from an AG.The proposed methods are applied to the compiler, and efficient address allocations are derived for several examples.Second, modulo AR update operations, such as AR*1MOD4, are newly considered in indirect addressing. A class of AG suitable for this new addressing model is shown, and a memory allocation method based on extraction of this specific shaped graph (Chained Square Graph CSG) is proposed. From address allocation examples, the method is proved to be effective.All the methods presented above just require a memory access sequence, i.e. a sequence of variables in a given program, so that they are applicable for various compilers. Less

为了在最近的应用中获得高的计算性能，不仅要有效地利用算术单元和寄存器等硬件资源，而且要高效地访问大容量的存储空间。在许多寻址模式中，我们有间接寻址模式，它通过称为“地址寄存器(AR)”的专用寄存器来指向访问地址。通常，允许在一个指令周期内与算术运算一起执行简单的AR更新操作，例如AR*1。这种间接寻址可以很容易地以很低的硬件成本实现，并且对于实现诸如顺序阵列访问等特定的存储器访问具有很大的优势。假设我们对用通用语言编写的给定程序的所有存储器访问使用这种间接寻址，由可用的编译器技术生成的目标代码通常包括与存储器访问有关的大量开销。在本研究项目中，只使用了一款间接内存…处理器假设了更多的内存寻址方式，讨论了降低内存访问开销的各种代码优化方法。在前面的方法中，假设使用AR*1操作的间接寻址。该方法用图或访问图(简称AG)表示给定的内存访问，然后基于折线图提取算法，确定给定程序中变量的有效内存分配以及每次内存访问的有效AR分配。在该项目中，假设了具有附加AR操作的扩展间接寻址模型，并研究了新的启发式代码优化算法。由于三角形图及其链式结构(链式三角图CTG)可以提供有效的内存地址分配，提出了一种基于从AG中提取CTG的内存分配方法。该方法被扩展为具有AR*1、AR*2、...、AR*k更新操作的间接寻址。该方法基于链式团图(CCG)算法，并将该方法应用于编译程序中，得到了有效的地址分配结果。其次，在间接寻址中引入了AR*1MOD4等模AR更新操作。给出了一类适合这种寻址模型的AG，并提出了一种基于这种特殊形状图提取的存储分配方法(链式正方形图CSG)。通过地址分配实例验证了该方法的有效性，所有这些方法都只需要一个内存访问序列，即给定程序中的一个变量序列，从而适用于各种编译器。较少