BIST for Intelligent Self-Testing of Integrated Circuits at Manufacture and In-Life
BIST for Intelligent Self-Testing of Integrated Circuits at Manufacture and In-Life
批准号:
102015
负责人:
金额:
$42.73万
依托单位:
依托单位国家:
英国
项目类别:
Collaborative R&D
财政年份:
2015
资助国家:
英国
项目状态:
已结题
起止时间:
2015 至 --
中文摘要
全球半导体行业在测试数据转换器(ADC和DAC)方面面临重大挑战,这不仅占用了研发资源,而且限制了最高规格产品的发布。ATEEDA通过最近完成的SMART可行性研究,在仿真中展示了一种用于ADC和DAC的内建自测试(BIST)新方法。两项核心创新目前正在申请专利,允许高精度(例如音频)转换器BIST。ATEEDA将与兰开斯特大学合作,以降低技术风险,并在硅中验证这种方法是否符合商业要求。由此产生的演示器将给客户信心,这将转化为一个制造环境,使商业评估和购买。高精度Ancross-BIST是一个重要的市场机会,ATEEDA在成功完成该项目后处于有利地位,但风险太高,无法证明开发的合理性。
英文摘要
The global semiconductor industry faces major challenges in testing data converters – ADCs and DACs –occupying R&D resources and constraining release of highest specification products. ATEEDA has demonstrated (via a recently completed SMART feasibility study) a new approach to Built-In Self-Test (BIST) for ADCs and DACs in simulation. Two core innovations are now patent-pending, permitting high-precision (e.g. audio) converter BIST. ATEEDA will work with Lancaster University to mitigate technical risks and validate in silicon that this approach meets commercial requirements. The resultant demonstrator will give customers confidence that this will translate into a manufacturing environment, enabling commercial evaluation and purchase. High-precision Analogue BIST is a significant market opportunity ATEEDA is well positioned to exploit following successful completion of this project, but where the risks are too high to justify development otherwise.
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海外基金
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批准号:--
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项目类别:外国学者研究基金项目
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资助金额:--
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批准年份:2024
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负责人:USHARANI HAREESH GOVINDARA JAN
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依托单位: