Quantum Simulations of Future Solid State Transistors

电脑和电子产品，如iPhone，已经改变了现代生活。硅晶体管是这场革命的核心，在过去的40年里，它一直在不断地变得更快、更小。在一个芯片中，数百万个芯片被挤在一个针头大小的区域内，在一秒钟内切换10亿次。晶体管的尺寸现在已经达到纳米尺寸；一纳米只比一个原子大十倍。摩尔定律规定，晶体管尺寸每两年减半，是电子行业成功背后的驱动力，但该定律已陷入停滞。晶体管缩放的快乐和轻松日子现在已经一去不复返了。量子力学定律与晶体管的功能背道而驰，使其在关闭时泄漏，并产生糟糕的电气控制。此外，我们无法在制造过程中控制界面和化学成分的精确原子结构，这使得晶体管更难预测。因此，半导体公司正在寻找替代的非平面(多栅)晶体管架构和新器件，如纳米线、纳米管、石墨烯和分子晶体管，它们最终将突破纳米尺寸的障碍，导致一个全新的小型化时代。我们制造晶体管的能力和预测其行为的能力之间存在着很大的差距，对硅晶体管的模拟和预测已经成为一项至关重要的任务。目前的平面晶体管结构在漏电和可控性方面存在严重的可扩展性问题。纳米尺寸的晶体管比以前的微米尺寸的晶体管更容易受到物质的原子性质的影响。此外，在纳米尺度上，由于导热系数的降低，对于新型晶体管应用来说，热传递是热死亡的来源。在此背景下，我建议开发一个量子器件模拟器，具有原子分辨率，能够准确预测现在和未来的晶体管性能。该模拟器将采用电子传播的量子波描述，在完全量子力学水平上处理电子与晶格振动(热)的相互作用。它将具有描述电子与半导体/电介质界面粗糙度的相互作用以及在强电场作用下相互作用的能力。设备将在材料、化学成分和几何形状方面进行适当的测试和优化，而不会产生制造过程中隐含的高成本。将探索从平面、非平面和新颖的广泛范围的晶体管。这是及时的，因为现有的计算机设计工具缺乏纳米级的预测能力，工业构建和测试方法已经变得昂贵得令人望而却步。高效的量子模型/算法/方法和工具将被开发出来。随着设备尺寸向原子领域靠拢，这是一个动态的时代，原子本质上是不可控制的。在这种体制下，两股流发生碰撞：经典世界和量子世界，这使得在我们努力以这种规模征服自然时，对新的规则和模式的需求至关重要。这提供了将工程学自上而下的方法与物理自下而上的方法相结合的机会。随着21世纪环境问题的加剧，对更环保技术的需求也在增加。我的建议涉及降低能耗、减少提供更多功能的原材料以及提供一种更便宜的方法来评估新的设计技术。总而言之，这些将帮助企业为消费者提供更环保的选择。

Computers and electronic gadgets, such as the iphone, have transformed modern life. The silicon transistor is at the core of this revolution, having been continuously made faster and smaller over the last forty years. In a chip, millions of them are squeezed into an area the size of a pinhead, switching a billion times in one second. Transistor size has now reached nanometre dimensions; one nanometre is only ten time larger than an atom. Moore's law, which dictates that transistor size halves every two years and is the driving force behind the success of the electronics industry, has come to a halt. The happy and easy days of transistor scaling are now gone. Quantum mechanical laws conspire against transistor function making it leak when switched off and generating poor electrical control. Also, our inability to control the precise atomic structure of interfaces and chemical composition during fabrication makes transistors less predictable. Hence semiconductor companies are searching for alternative, non-planar (multigate) transistor architectures and novel devices such as nanowires, nanotubes, graphene and molecular transistors, which will ultimately break through the nano-size barrier resulting in a completely new era of miniaturization. There is a significant gap between our ability to fabricate transistors and to predict their behaviour.The simulation and prediction of the silicon transistor has become an vital mission. Current planar transistor architecture presents serious problems in scalability regarding leakage and controllability. Transistors of nanometre dimensions are more vulnerable to the atomic nature of matter than their previous cousins of micrometre dimensions. Furthermore, at nanoscales heat transfer is a source of heat death for novel transistor applications due to the decrease of thermal conductivity. Within this context I propose to develop a Quantum Device simulator, with atomic resolution that will enable the accurate prediction of present and future transistor performance. The simulator will deploy a quantum wave description of electron propagation, treating the interaction of electrons with crystal lattice vibrations (heat) at a fully quantum mechanical level. It will have the capability of describing the electron interactions with the roughness of the semiconductor/dielectric interface and with each other under the effect of a high electric field. Devices will be properly tested and optimised regarding materials, chemical composition and geometry without the high costs implicit in fabrication. A wide range of transistors will be explored from planar, non-planar and novel. This is timely as existing computer design tools lack predictive capabilities at the nanoscale and the industrial build-and-test approach has become prohibitively costly. Efficient quantum-models/algorithms/methodologies and tools will be developed.These are dynamic times as device dimensions move closer to the realm of atoms, which are inherently uncontrollable. In this regime two streams collide: the classical and quantum worlds making the need for new regularities and patterns vital as we strive to conquer nature at this scale. This offers exiting opportunities to merge an engineering top-to-bottom approach with a physics bottom-up approach. As 21st century environmental concerns rise, the need for greener technology is increasing. My proposal addresses the lowering of power consumption, raw material reductions delivering more functionality and the provision of a cheaper way to assess new design technologies. Collectively, these will help companies to provide a greener alternative to consumers.