Manufacturing of nano-engineered III-N semiconductors: Equipment Business Case

用于定义纳米级器件几何形状的工具广泛应用于CMOS制造中，但SiVLSI的规模经济并不适用于大多数其他半导体行业。传统的光刻技术受到它们可以图案化的最小特征尺寸的限制，因此实现更小的特征通常需要使用昂贵而缓慢的电子束光刻技术。因此，只有很小的区域可以在最高分辨率下进行图案化。用于纳米级设备的成本效益高的晶片规模解决方案确实存在，但不太广泛。它们包括纳米压印光刻(NIL)、自组装光刻(SAL)或最近的位移Talbot光刻(DTL)。NIL可以实现10 nm以下的特征，但对颗粒缺陷非常敏感；SAL价格便宜，但限于有限的图案和磁区大小；DTL是一种新的潜在颠覆性技术，适用于150-1000 nm范围的应用(英国没有DTL系统)。这笔拨款的目的是通过展示NIL和DTL这两种技术从小面积纳米材料或器件扩大到全晶片的能力，将它们更多地带入主流。NIL和DTL设备将使我们能够确定最合适的技术(因为其中任何一种都不能满足所有应用的要求)和相关的纳米制造工艺，在一系列材料中创建纳米级图案(10-1000 nm)，用于各种应用。晶片规模的纳米图形能力对于新兴器件类型的商业生产和研究应用至关重要，因为在这些应用中，后续工艺步骤需要大面积均匀。后者的一个例子是在纳米衬底上生长晶体，因为大面积图案对于在生长反应器中实现良好的生长均匀度是必不可少的。建立这些纳米光刻技术背后的最终目标是为英国21世纪的制造业开发先进的制造工艺，特别是III-氮化物半导体材料的制造。III-氮化物是支撑全球新兴固态照明和电力电子行业的功能材料。但它们的特性可以实现更广泛的应用：通过光伏效应和分解水来转换太阳能，净化水，通过光子和压电效应进行传感，以及在非线性光学中。III-氮化物的这些功能的许多应用都得到了增强，甚至可以通过创建三维(3D)纳米结构来实现。然而，只有当有值得生产的工艺可用时，才能实现对这些财产的开发。因此，这项建议的目的是。

Tools for defining nanoscale device geometry are widely used in CMOS manufacturing but the economies of scale of Si VLSI do not apply to most other semiconductor industries. Conventional photolithographic techniques are limited by the size of the smallest features that they can pattern so that achieving even smaller features typically requires using the expensive and slow technique of Electron Beam Lithography. As a result only very small regions can be patterned at the highest resolution. Cost-effective wafer-scale solutions for nanoscale devices do exist but are less widely available. They include Nanoimprint Lithography (NIL), Self-Assembly Lithography (SAL), or more recently Displacement Talbot Lithography (DTL). NIL can achieve sub-10nm features but is very sensitive to particle defects, SAL is cheap but is restricted to limited patterns and domain sizes, and DTL is a new and potentially disruptive technology for applications in the 150-1000 nm range (No DTL systems exist in the UK). The aim of this grant is to bring the two techniques of NIL and DTL more into the mainstream by demonstrating their capability for up-scaling from small area nanopatterned materials or devices into full wafers. The NIL and DTL equipment will allow us to determine the most suitable technique (since either one will not satisfy the requirements for all applications) and related nanofabrication processes creating nano-scale patterns (10-1000 nm) in a range of materials for a variety of applications.The ability to nanopattern at the wafer scale is essential for commercial production of emerging device types and for research applications where large-area uniformity is necessary for subsequent processing steps. An example of the latter is crystal growth on nanopatterned substrates since large area patterns are essential to achieve good uniformity of growth in the growth reactor. The ultimate goal behind establishing these nanolithography techniques is to develop advanced fabrication processes for the UK's 21st Century manufacturing industries, and in particular the manufacturing of III-Nitride semiconductor materials. The III-Nitrides are functional materials that underpin the emerging global solid state lighting and power electronics industries. But their properties enable far wider applications: solar energy conversion by photovoltaic effect and water splitting, water purification, sensing by photonic and piezoelectric effects and in non-linear optics. Many applications of these functions of the III-Nitrides are enhanced, even enabled by creating three dimensional (3D) nanostructures. However the exploitation of these properties can only be achieved if there are production-worthy processes available. Hence the purpose of this proposal.