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Innovative parallelism and programming for micro-core architectures

微核架构的创新并行性和编程

基本信息

批准号：
1929846
负责人：
金额：
--
依托单位：
University of Edinburgh
依托单位国家：
英国
项目类别：
Studentship
财政年份：
2017
资助国家：
英国
起止时间：
2017 至无数据
项目状态：
已结题

来源：
https://gtr.ukri.org/projects?ref=studentship-1929846
关键词：
Innovative parallelism programming micro core

项目摘要

Modern central processing units (CPU) have provided significant performance gains over previous generations but at increasingly unsustainable levels of power consumption. Micro-core architectures combine a large number of simple, low-power, low-memory cores placed on a single chip, providing significant parallel performance at very low power levels. However, micro-core architectures are difficult to program and the immaturity of programming support is currently a significant barrier to adoption.This research centres around the hypothesis that non-HPC programmers find parallelisation techniques found in micro-core architectures difficult and their preferred choice of dynamic programming languages (e.g. Python) exacerbates the issue. The focus of this work is concerned with programmability, both in terms of design and implementation. The programming language ePython has been used as a research vehicle for the work, with the intention that findings from the research questions will have a wide relevance to mainstream technologies.The research questions that this project is currently addressing are:1. What is the most effective way to support programmer interaction with micro-core architectures?2. Are the techniques in the current ePython implementation appropriate for other micro-core architectures?3. What is the realistic performance that Python / High-Level Language programmers can expect on micro-core architectures?ePython has been developed specifically to target micro-core architectures, providing a simple, yet rich, parallel programming environment. It has been successfully ported to a number of micro-core architectures: the Adapteva Epiphany III, Xilinx MicroBlaze and PicoRV32 RISC-V.This work has resulted in two key achievements for the leveraging of extremely memory-constrained micro-core accelerators within the ePython programming language: the ability to manage arbitrary large data and the support of natively compiled codes of unbounded size. ePython now not only provides Python developers with performance approaching 90% of hand-coded C applications with dynamic code loading, within a minimum memory footprint of only 3KB.The restrictions imposed by the COVID-19 pandemic have had, and continue to have, a major impact on my family care duties and household income, requiring additional non-project work. Consequently, an application was submitted and granted for a 6-month EPSRC PhD funding extension, ensuring that the project will be successfully brought back on track.Publications:M. Jamieson and N. Brown, 'High level programming abstractions for leveraging hierarchical memories with micro-core architectures', Journal of Parallel and Distributed Computing, vol. 138, pp. 128-138, Apr. 2020, doi: 10.1016/j.jpdc.2019.11.011.M. Jamieson, N. Brown, and S. Liu, 'Having your cake and eating it: Exploiting Python for programmer productivity and performance on micro-core architectures using ePython', Proceedings of the 19th Python in Science Conference (SciPy2020), Virtual Conference, pp. 107-115, 2020, doi: 10.25080/Majora-342d178e-00f.Conference posters:M. Jamieson, N. Brown, 'Eithne: A Framework for Benchmarking Micro-Core Accelerators', Poster presented at: SC19 Conference, Denver, Colorado, 2019 Nov 17-22. [Online]. Available: https://sc19.supercomputing.org/proceedings/tech_poster/tech_poster_pages/rpost186.htmlM. Jamieson, N. Brown, and S. Liu, 'Having your Cake and Eating it: Exploiting Python for Programmer Productivity and Performance on Micro-core Architectures Using ePython', Poster presented at: 19th Python in Science Conference (SciPy2020), Virtual Conference, 2020 Jul 6-12. [Online]. Available: https://raw.githubusercontent.com/mesham/epython/master/docs/SciPy-20-landscape-v1d6.pdf

现代中央处理器（CPU）与前几代相比提供了显着的性能提升，但功耗水平越来越不可持续。微内核架构联合收割机将大量简单、低功耗、低内存的内核组合在单个芯片上，以极低的功耗水平提供显著的并行性能。然而，微核心架构很难编程，编程支持的不成熟是目前采用的一个重大障碍。这项研究围绕着这样一个假设，即非HPC程序员发现微核心架构中的并行化技术很难，他们首选的动态编程语言（例如Python）加剧了这个问题。这项工作的重点是关注可编程性，无论是在设计和实施方面。本课题的研究工具是ePython编程语言，目的是使研究课题的结果与主流技术有广泛的相关性。本课题的研究课题是：1.支持程序员与微内核架构交互的最有效方法是什么？2.当前ePython实现中的技术是否适用于其他微核心架构？3. Python /高级语言程序员在微核心架构上可以期望的实际性能是什么？ePython是专门针对微核心架构开发的，提供了一个简单而丰富的并行编程环境。它已成功移植到许多微核心架构：Adapteva Epiphany III，Xilinx MicroBlaze和PicoRV 32 RISC-V。这项工作为在ePython编程语言中利用内存极度受限的微核心加速器带来了两项关键成就：管理任意大数据的能力和支持无限大小的本机编译代码。ePython现在不仅为Python开发人员提供了接近90%的手动编码C应用程序的性能，并具有动态代码加载，最小内存占用仅为3 KB。COVID-19大流行所施加的限制已经并将继续对我的家庭照顾责任和家庭收入产生重大影响，需要额外的非项目工作。因此，提交了一份申请，并获得了为期6个月的EPSRC博士资助延期，确保该项目将成功地回到正轨。出版物：M. Jamieson和N. Brown，“利用微核心架构的分层存储器的高级编程抽象”，并行和分布式计算杂志，第138卷，第138页。128-138，2020年4月，doi：10.1016/j.jpdc.2019.11.011.M。Jamieson，N. Brown和S. Liu，“Having your cake and eating it：Exploiting Python for programmer productivity and performance on micro-core architectures using ePython”，Proceedings of the 19th Python in Science Conference（SciPy 2020），Virtual Conference，pp. 107-115，2020，doi：10.25080/Majora-342 d178 e-00 f.会议海报：M. Jamieson，N. Brown，“Eithne：用于基准测试微核心加速器的框架”，海报于2019年11月17日至22日在科罗拉多丹佛举行的SC 19会议上展示。[联机]。可通过以下网址获得：https://sc19.supercomputing.org/proceedings/tech_poster/tech_poster_pages/rpost186.htmlM。Jamieson，N. Brown和S. Liu，“Having your Cake and Eating it：Exploiting Python for Programmer Productivity and Performance on Micro-core Architectures Using ePython”，海报发表于：第19届Python in Science Conference（SciPy 2020），虚拟会议，2020年7月6日至12日。[联机]。可用网址：https://raw.githubusercontent.com/mesham/epython/master/docs/SciPy-20-landscape-v1d6.pdf