Integration, development and deployment of spatially multiplexed single photon sources
Integration, development and deployment of spatially multiplexed single photon sources
批准号:
2595749
负责人:
金额:
$0.0万
依托单位:
依托单位国家:
英国
项目类别:
Studentship
财政年份:
2021
资助国家:
英国
项目状态:
未结题
起止时间:
2021 至 --
中文摘要
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英文摘要
Project Description: When creating a spatially multiplexed single photon source, low interference and high efficiency integration of components is critical to provide feedforward in low temperature environments. Realising the use-cases of such a device is key for near-term applications. This project will be split into two main goals: systems level integration and hardware component design, and theorising novel use-cases of high efficiency single photon sources. The hardware level approach compromises of designing and developing ways of integrating subsystems to create a single photon source i.e. packaging techniques between chips(photon sources andSNSPD's),integration with cryogenics, optical interfaces between components. This comprises of applying existing literature toa device built on SoI using integrated microelectronics and flip chip bonded detectors. Avenues for optimising system components include investigating novel methods of creating low-losson chip delay lines and low temperature modulation schemes. Unsure whether this scope is too large for duration of the PhD. These components can then be used to qualify and optimise source brightness and fidelity. The theoretical use-cases of such a multiplexed source comprises of looking at target fidelity and efficiency bounds for creating bell pairs(and eventually GHZ states),and the feasibility of using for multiplexed sources for quantum communication protocols -i.e. entanglement swapping and quantum repeaters. The work will be performed within the big photon group, working alongside Seb Currie, Dom Sulway and Jeremy Adcock. The group has funding for a further two years, with existing equipment consisting of 2um lasers and broadband sources, OSA, single photon SNSPD's, chip rigs, a fridge for cryogenic integration (currently being built), and funding for future SoI chip runs. There will be collaboration will the Qcomms's group in generating theoretical use-cases
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