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Optimisation of Probabilistic Deep Learning Approaches for Hardware Acceleration

Optimisation of Probabilistic Deep Learning Approaches for Hardware Acceleration
用于硬件加速的概率深度学习方法的优化
批准号:
2621264
负责人:
金额:
$0.0万
依托单位:
依托单位国家:
英国
项目类别:
Studentship
财政年份:
2021
资助国家:
英国
项目状态:
未结题
起止时间:
2021 至 --

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中文摘要
翻译
本项目的重点是研究和开发深度学习中概率模型的有效映射方法和近似方案,例如贝叶斯神经网络,在低功耗嵌入式设备上,如CPU(中央处理单元)、NPU(神经处理单元)和FPGA(现场可编程门阵列)。尽管神经网络加速取得了显著的进展,但众所周知,传统的神经网络可能容易过拟合和泛化能力差--模型无法很好地从训练数据到测试(看不见的)数据进行泛化。通常的情况是,典型的深度神经网络模型在预测的同时,不能提供对不确定性的可靠估计--它们可能对看不见的数据过于自信。稳健的不确定性对于现实生活场景--例如自动驾驶、医疗保健等--非常重要,在这些场景中,可以使用不确定性指标作为决策的基础。有太多的研究,通常在概率框架下,目的是在深度学习中解决这个问题,例如贝叶斯神经网络和深度集成。然而,这些方法在计算上通常很繁琐。这项研究的目标是提高我们对这些类型模型的计算方面的理解,并探索跨整个堆栈(从模型到硬件)的各种优化策略,以便在低功耗嵌入式平台上高效地实施它们,例如CPU、NPU等。领域:人工智能技术
英文摘要
The focus of this project is to investigate and develop methodologies and approximation schemes for the efficient mapping of probabilistic models in deep learning, such as Bayesian Neural Networks, on low-power embedded devices such as CPUs (Central Processing Units), NPUs (Neural Processing Units), and FPGAs (Field Programmable Gate Arrays). Despite the significant progress of neural network acceleration, it is well known that conventional neural networks can be prone to overfitting and poor generalisation - where the model fails to generalise well from the training data to test (unseen) data. It is often the case that typical deep neural network models do not provide reliable estimates of uncertainty alongside their predictions - they can be overconfident on unseen data. Robust uncertainties are important for real-life scenarios - e.g., autonomous driving, healthcare etc., where decisions may be made using uncertainty metrics as a basis. There exists a plethora of research, often under a probabilistic framework, with the aim of tackling this problem in deep learning, such as Bayesian Neural Networks and Deep Ensembles. However, these approaches are often computationally cumbersome. The goal of this research is to improve our understanding of the computational aspects of these types of models and to explore various optimisation strategies across the full stack (from model to hardware) for efficient implementation of them on low-power embedded platforms - e.g. CPU, NPU etc.Area: Artificial intelligence technologies
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