Hybrid CMOS-RRAM ANN accelerator chip

混合 CMOS-RRAM ANN 加速器芯片

• 批准号: 2898071
• 金额: --
• 依托单位: University of Southampton
• 依托单位国家: 英国
• 项目类别: Studentship
• 财政年份: 2021
• 资助国家: 英国
• 起止时间: 2021 至 无数据
• 项目状态: 未结题
• 来源: https://gtr.ukri.org/projects?ref=studentship-2898071
• 关键词: Hybrid; CMOS; RRAM; ANN; accelerator

The objective of the project is to design, build and benchmark a general-purpose ANN accelerator using a mixture of traditional CMOS and emerging RRAM technologies. The lynchpin of the idea is a minimalistic system consisting of 3x key blocks that perform signal processing across domains: an input processor converting a digital input into the time domain (D-T), a RRAM synapse converting a time-domain input into analogue output (T-A) and a very basic ADC-like "neuron" that converts analogue inputs to digital values (A-D). The latter can be then broadcast across the network and directly feed the input of the system. The advantage of this approach is that every operation is performed in its own, optimal domain whilst the circuits involved are all extremely minimalistic in implementation and perform the transformations "naturally", much like a resistor naturally converts a current passed through it into a voltage across its terminals. The system is conceived to attack the niche of low power, small size non-speed-critical systems.The project will require development of each of the basic circuits (input, synapse, neuron), along with an appropriate control and timing structure to orchestrate the operation of the system. Upgrades to be pursued during the project include a learning module. The final deliverable of the project would be a chip with RRAM devices post-processed on top of it, operating a simple ANN. This is likely to be a basic MNIST classification multi-layer perceptron with a basic CNN for image recognition to be pursued afterwards.

该项目的目标是使用传统CMOS和新兴RRAM技术的混合设计，构建和基准测试通用人工神经网络加速器。这个想法的关键是一个极简的系统，由3个执行跨域信号处理的关键模块组成：一个输入处理器将数字输入转换为时域（D-T），一个RRAM突触将时域输入转换为模拟输出（T-A），一个非常基本的类似adc的“神经元”将模拟输入转换为数字值（a -d）。后者可以通过网络进行广播，并直接提供给系统的输入。这种方法的优点是，每个操作都在自己的最佳域内执行，而所涉及的电路在实现上都非常简单，并且“自然”地执行转换，就像一个电阻自然地将通过它的电流转换成通过其端子的电压一样。该系统旨在攻击低功耗，小尺寸非速度关键系统的利基。该项目将需要开发每个基本电路（输入，突触，神经元），以及适当的控制和定时结构来协调系统的操作。项目期间要进行的升级包括一个学习模块。该项目的最终成果将是一个芯片，上面有后处理的RRAM设备，操作一个简单的人工神经网络。这很可能是一个基本的MNIST分类多层感知器，之后会有一个基本的CNN用于图像识别。