Multi-channel Receiver Integrated With Reconfigurable Processors for MRI

集成可重构处理器的 MRI 多通道接收器

• 批准号: 9375046
• 负责人: Limin Li
• 金额: $ 21.34万
• 依托单位: NORTHSHORE UNIVERSITY HEALTHSYSTEM
• 依托单位国家: 美国
• 财政年份: 2017
• 资助国家: 美国
• 起止时间: 2017-09-01 至 2019-06-30
• 项目状态: 已结题
• 来源: https://reporter.nih.gov/project-details/9375046
• 关键词: Address; Architecture; Brain; Characteristics; Communities; Computers; Data; Development; Devices; Electronics; Foundations; Future; Generations; Goals; Image; Individual; Lead; Location; Magnetic Resonance Imaging; Methods; Outcome; Output; Performance; Physiologic pulse; Process; Research; Research Personnel; Resolution; Running; Signal Transduction; Slice; Speed; Structure; System; Testing; Time; Variant; Work; analog; base; computerized data processing; cost effective; cost efficient; data acquisition; data management; design; design and construction; digital; experience; experimental study; flexibility; image processing; image reconstruction; imaging system; innovation; magnetic field; neuroimaging; novel; parallel processing; programs; prototype; signal processing; tool

Project Summary/Abstract This project proposes to develop a receiver system for high-speed MRI. This novel system will integrate a digital receiver with reconfigurable real-time processors in order to receive MR signals and process image in real time during an MRI experiment. The receiver system will be built on a single integrated-circuits (IC) chip of a Field Programmable Gate Array (FPGA). The architecture of the receiver will include developed modules for the analog RF front end, digital baseband signal demodulation, receive control, in-line data correction and image reconstruction. By taking advantage of the parallel processing capability of FPGAs, the receiver will not only control the multiple processing modules running simultaneously, but also allow real-time inter-module interactions. This capability will enable high-speed MRI and offers the potential for expansion to true dynamic stabilization of the system hardware in the future work. We describe a research plan for the design, construction and testing of all individual modules, for the integration of these modules into a functional receiver system prototype, and for incorporating this system into our Bruker 9.4T MRI scanner. The architecture of the receiver will be implemented on a commercially-available FPGA board and thus the design approach will be easily be shared with other research labs in MRI community. We anticipate that integrating the proposed receiver with an MRI scanner will offer a cost-efficient, flexible tool for achieving high-speed imaging and suppressing data errors induced by system perturbations. This system will be particularly valuable for a variety of applications in the fields of functional and connectivity neuroimaging using MRI.

项目总结/摘要 本计画拟发展一套高速磁振造影之接收系统。这个新系统将集成一个 具有可重新配置的实时处理器的数字接收器，以便接收MR信号并处理图像， 真实的时间。接收器系统将建立在单个集成电路（IC）芯片上， 现场可编程门阵列（FPGA）。接收机的结构将包括开发的模块， 模拟RF前端、数字基带信号解调、接收机控制、在线数据校正 图像重建通过利用FPGA的并行处理能力，接收机将不会 不仅可以控制多个处理模块同时运行，还可以允许模块间的实时交互 交互.这种能力将使高速MRI成为可能，并提供扩展到真正动态的潜力。 在今后的工作中，系统硬件的稳定性。我们描述了设计的研究计划， 所有单个模块的构造和测试，用于将这些模块集成到功能接收器中 系统原型，并将该系统纳入我们的布鲁克9.4T MRI扫描仪。的架构 接收器将在市售FPGA板上实现，因此设计方法将 很容易与MRI社区的其他研究实验室共享。我们预计，整合拟议的 带有MRI扫描仪的接收器将为实现高速成像提供一种具有成本效益的灵活工具， 抑制由系统扰动引起的数据误差。该系统将特别有价值的各种 在使用MRI的功能和连接性神经成像领域的应用。