Dynamic spectrum sharing techniques for next-generation wireless networks

该项目旨在开发新颖的和可实现的动态频谱共享技术，以支持新兴的宽带人类和机器类型的无线应用。特别是，我们认为宽带频谱感知和接入算法的集中式和分散式网络架构的实际限制，考虑到国家的最先进的硬件的联合设计。该项目基于INRS研究团队和行业合作伙伴（Nutaq）之间的现有合作，并利用INRS的专业知识和最先进的设施。本研究的长期目标是为高速无线网络开发鲁棒、高效的宽带频谱感知和动态频谱共享技术。为此，其短期目标是设计i）宽带频谱感测解决方案，其对包括噪声不确定性和无线衰落在内的不同不良因素具有鲁棒性; ii）分散式动态频谱共享协议，其有效地集成了频谱感测功能;以及iii）集中式动态频谱共享技术，其利用授权和未授权频谱，并支持用户的QoS和差异化服务。该项目的独特之处在于，它统一了频谱感知和接入算法的设计，而在现有文献中，这两种算法通常是分开处理的。此外，它还包括基础研究和设计问题的研究，以及实验研究活动，其中选择性开发的算法在硬件平台上实现，以进行真实世界的性能评估。

This project aims to develop novel and implementable dynamic spectrum sharing techniques to support emerging broadband human and machine-type wireless applications. In particular, we consider the joint design of wideband spectrum sensing and access algorithms for both centralized and decentralized network architectures considering practical limitations of state-of-the-art hardware. This project is based on the existing collaboration between the INRS research team and industry partner (Nutaq) and it exploits the expertise and state-of-the-art facility available at INRS. The long term objective of the proposed research is to develop robust and efficient wideband spectrum sensing and dynamic spectrum sharing techniques for high-speed wireless networks. Toward this end, its short-term objectives are to design i) wideband spectrum sensing solutions that are robust against different undesirable factors including noise uncertainty and wireless fading; ii) decentralized dynamic spectrum sharing protocols efficiently integrating the spectrum sensing function; and iii) centralized dynamic spectrum sharing techniques exploiting both licensed and unlicensed spectrum and supporting users' QoS and differentiated services. This project is unique in that it unifies the design of spectrum sensing and access algorithms, which are usually treated separately in the existing literature. In addition, it comprises the study of fundamental research and design issues as well as experimental research activities where selective developed algorithms are implemented on hardware platforms for real-world performance evaluation.