Intelligently orchestrating communication in many-core architectures

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Improvement in communication for computer architectures will have broad impact on the computing industry and will have significant benefits to Canada. Improved communication will enable novel, larger computer systems that can be leveraged by researchers in a wide range of disciplines from medicine to economics. My research will provide greater computational capabilities to enable the researchers in these fields to solve some of society's most pressing issues. There is a critical need for HQP in the area of computer systems. Students trained on this project will gain expertise in architecture, software, compilers, algorithms and circuits and be highly sought after by numerous Canadian companies.Over the last several decades, the computer industry has doubled the number of transistors per chip with each technology generation (every 18-24 months); this is known as Moore's Law. These high transistor densities have created a power wall, limiting the rate of clock frequency scaling in general purpose processors. As a result, processor vendors such as Intel, AMD and IBM now incorporate multiple processors on a single chip to improve performance, rather than a single core with increased speed and/or complexity. As a result, parallel architectures based on multi-core technology are ubiquitous--they can be found across all types of computer systems from servers to cellphones.To leverage the computational capabilities of these multiple cores, communication between cores is essential. As with any teamwork activity, the best progress is made when all team members are communicating frequently and working together; it is much the same with parallel computer architectures. Communication plays a critical role in overall system performance. My current research agenda focuses on computer architectural and software techniques to streamline and improve the efficiency of the communication between cores. Poorly architected communication fabrics can lead to performance and power bottlenecks for computing systems. It is projected that the energy expended on communication will exceed that consumed by computation in future generations of computing systems. Although multi-core computing has allowed us to temporarily side-step power issues, power is once again a critical issue; dark silicon, or the inability to power on all parts of the chip simultaneously will become a reality in just a few technology generations. Communication will play a vital role in orchestrating dark silicon systems by efficiently moving data to/from hardware accelerators specifically designed to run computations in the most power-efficient manner.The long term goals of this research are to1. Leverage online learning techniques to optimize the performance and energy-efficiency of the communication fabric. By observing and learning from an application’s runtime behaviour, we can tailor the communication fabric to provide greater energy efficiency.2. Hardware and software optimizations that trade-off accuracy for performance and energy efficiency. Approximate computing proposes to save power by allowing some error to emerge in computations. For example, image processing can tolerate some error that will not be noticeable to the human eye. We will explore the implications of approximate computing on communication requirements and explore the tolerance of these applications to communication errors.3. Explore the role of communication in dark silicon architectures and hardware optimizations to facilitate improved communication. In current on-chip network architectures, it is often difficult to power-down a subset of the network. We will explore new topologies and architectures that are specifically designed to be partially powered down to support dark silicon.