Semantically rich networks for many-core architectures

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Computers have become pervasive throughout our society. By increasing productivity and mobility, as well as providing new avenues of entertainment, computers have been commonplace in professional and personal lives. The wide array of uses and applications of computers present numerous challenges to hardware designers. In the last decade, the computer industry has begun to successfully integrate multiple processing cores on a single chip through improvements in manufacturing technology. In previous decades, purchasing parallel computing equipment represented a massive financial investment for a corporation. Today, parallel architectures are cheap enough to produce that they can be found in cell phones and laptops. As a result, parallel architectures are rapidly becoming ubiquitous. To leverage the computation power of these multiple cores, communication between cores or devices is essential. As in any teamwork activity, the best progress is made when all team members are communicating frequently and working together; it is much the same with parallel computer architectures. The work in this proposal looks at streamlining the communication between cores to increase its efficiency. Communication between cores should be natural and intuitive; this work proposes to improve the mechanisms that carry out that communication. Improvement in communication for computer architectures will have a wide impact across Canadian industry; software productivity and application development time will be improved substantially.