An energy efficient platform for mobile computing

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Our mobile devices are struggling to meet end-user expectation and engineering reality. Compute capability of these devices are driven by exponential growth in mobile apps to support consumer convenience, context such as social networking, security and productivity. As a result, the mobile memory bandwidth is doubling every two years, and predicted 64 Gb/s mobile memory bandwidth requirement by 2017 will be well beyond the projected capacity of industry standard memory interface technology. However, advance in battery technology and thermal budget is falling behind. Based on current trend and international technology road map for semiconductor (ITRS) projection, in 2024 a hand held device will dissipate approximately 7 Watts of power whereas the projected thermal budget sets the limit to be 1 watt only. To summarize, main challenges for future mobile computing are: lower read and write bandwidth, higher latency, and limited processing power for the given battery life. This research proposal is motivated by these challenges. Energy inefficiency in mobile systems is mainly originated from limitation of hardware which is designed to support the highest capacity or peak performance. However, highest capacity of the system is utilized for only a small fraction of its operating time, and most of the time the system is under-utilized. Although the system is under-utilized, the existing hardware does not allow energy consumption to scale accordingly. This research aims at enabling energy efficient high performance mobile platform that will be built upon several key ideas: 1. Scalable on-chip network that enables energy efficient parallel data processing. 2. An intelligent resource management that can sense processor load, and accordingly enable, shutdown or change frequency of the core to compute at a different rates. 3. Agile, fine grained dynamic voltage and frequency scaling schemes that enables the resource manager to maximize energy efficiency. 4. Energy proportional, high bandwidth memory interface. Successful execution of my research will shape mobile processor and memory road map that meets the demand for future mobile computing in an energy conscious manner.**********