Architectures and Integrated Circuits for Power-Efficient Communication Systems and Beyond

适用于高能效通信系统及其他系统的架构和集成电路

• 批准号: RGPIN-2017-06240
• 负责人: Mirabbasi, Shahriar
• 金额: $ 4.23万
• 依托单位: University of British Columbia
• 依托单位国家: 加拿大
• 项目类别: Discovery Grants Program - Individual
• 财政年份: 2020
• 资助国家: 加拿大
• 起止时间: 2020-01-01 至 2021-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=712106
• 关键词: Architectures; Integrated; Circuits; Power; Efficient

The main objective of this research program is to develop system and integrated circuit design techniques that improve the performance of system-on-chips for emerging and next-generation communication, Internet of Things (IoT) and biomedical applications. We will focus on techniques that reduces the power consumption of the system, therefore, improving the battery longevity in the context of mobile and wearable devices, with little or no compromise on the other performance metrics of the system. More specifically, for IoT and biomedical applications, we will design and experimentally validate power-scalable radio-frequency (RF) transceivers that depending on the status of the communication channel adjust their power consumption to efficiently achieve the desired performance. Also, in the context of emerging and next-generation communication applications, such as 5th generation (5G) systems, where to address the increasing demand for higher data rates the system has to operate at higher frequencies where more bandwidth is available, we will focus on the design and implementation of critical building blocks of the transceiver that allow for power efficient operation of the overall system. In this context, operation at mm-wave and (sub)THz frequencies calls for operating transistors at or beyond the frequency that the transistor can provide gain. It is the goal of this research to continue our exploratory efforts in development of new integrated circuit and system design techniques for variety of applications with a particular emphasis on wireless/wireline communication systems, biomedical circuits and imaging applications. Our past and current research in these areas have led us to interesting architectural and circuit-level design ideas and techniques to further improve the performance of CMOS circuits in terms of operation frequency as well as power efficiency. We will validate the proposed system- and circuit-level techniques using proof-of-concept prototype implementations in the mainstream integrated circuit technologies, namely, complementary metal-oxide semiconductor (CMOS) technologies. The proposed research offers further insights for better understanding of the achievable performance and limitations of analog, mixed-signal, RF, and mm-wave integrated circuits implemented in CMOS technologies. The results of this research will not only have scientific and engineering impacts, but also provide excellent opportunities for training highly qualified personnel which will in turn have technological and economical benefits for Canada and international community.

该研究计划的主要目标是开发系统和集成电路设计技术，以提高新兴和下一代通信、物联网(IoT)和生物医学应用的片上系统性能。我们将专注于降低系统功耗的技术，从而在移动和可穿戴设备的背景下提高电池寿命，而对系统的其他性能指标几乎或没有妥协。更具体地说，对于物联网和生物医学应用，我们将设计并实验验证功率可扩展的射频(RF)收发器，该收发器可以根据通信通道的状态调整其功耗，以有效地实现所需的性能。此外，在新兴和下一代通信应用(如第五代(5G)系统)的背景下，为了满足对更高数据速率的日益增长的需求，系统必须在更高的频率上运行，有更多的带宽可用，我们将专注于收发器的关键构建块的设计和实现，以实现整个系统的高能效运行。在这种情况下，在毫米波和(亚)太赫兹频率下运行需要在晶体管能够提供增益的频率或更高的频率上运行晶体管。这项研究的目标是继续我们的探索性努力，为各种应用开发新的集成电路和系统设计技术，特别是无线/有线通信系统、生物医学电路和成像应用。我们过去和现在在这些领域的研究已经引导我们形成了有趣的体系结构和电路级设计思想和技术，以进一步提高CMOS电路在工作频率和功率效率方面的性能。我们将使用主流集成电路技术，即互补金属氧化物半导体(CMOS)技术中的概念验证原型实现来验证所提出的系统级和电路级技术。这项拟议的研究为更好地了解采用CMOS工艺实现的模拟、混合信号、RF和毫米波集成电路的可实现性能和限制提供了进一步的见解。这项研究的结果不仅将产生科学和工程影响，而且还将为培训高素质人才提供极好的机会，这反过来将为加拿大和国际社会带来技术和经济利益。