Design, verification, and test of analog and mixed-signal integrated circuits with an emphasis on PLLs

模拟和混合信号集成电路的设计、验证和测试，重点是 PLL

• 批准号: 451560-2013
• 负责人: Mirabbasi, Shahriar
• 金额: $ 5.59万
• 依托单位: University of British Columbia
• 依托单位国家: 加拿大
• 项目类别: Collaborative Research and Development Grants
• 财政年份: 2015
• 资助国家: 加拿大
• 起止时间: 2015-01-01 至 2016-12-31
• 项目状态: 已结题
• 来源: https://www.nserc-crsng.gc.ca/ase-oro/Details-Detailles_eng.asp?id=575429
• 关键词: Design; verification; test; analog; mixed

Analog and mixed-signal (AMS) integrated circuits present post-silicon (post-Si) validation challenges because of the inherent limited controllability and observability of internal signals. Furthermore, the lack of rigorous specifications complicates the debug process because it can be difficult to determine if the response of a particular internal block is wrong or if it is only different than the responses that were observed in pre-Si simulations. While large chips are making more and more use of AMS blocks, the analog circuits themselves are becoming increasingly digital. Designers frequently use "digitally assisted techniques" to cope with the shortcomings of analog performance of the devices in advanced CMOS technologies by either augmenting the analog circuits with digital blocks or, when possible, by replacing them. For example, traditional phase-locked loops (PLLs) are giving way to predominantly digital designs with a minimum number of analog blocks, namely, the controllable oscillator, to limit the impact of device variability on the circuit. Furthermore, feedback control loops are ubiquitous in analog designs to compensate for process parameter, power supply voltage, and temperature (PVT) variations, adjust timing deskew, implement temperature regulation, etc. These control loops are almost always implemented using digital hardware or with software running on an embedded microcontroller. From this perspective, most AMS designs consist of a few analog blocks embedded in digital control loops. We observe that most of these control loops are based on simple controller designs such as proportional-integral (PI) controllers. Likewise, we observe that most analog blocks have simple responses, when viewed in the appropriate domains. By viewing AMS circuits as analog blocks embedded in digital controllers, the objective of this research is to obtain a generic structure for AMS circuits (with an emphasis on PLLs) that can be leveraged for pre-Si verification and post-Si debug and validation. We propose various techniques for design, verification, and test of AMS integrated circuits and confirm the validity of the techniques using proof-of-concept prototype integrated circuits implemented in advanced CMOS technologies.

模拟和混合信号(AMS)集成电路面临硅后(后硅)验证挑战，因为 内部信号固有的有限的可控性和可观测性。此外，缺乏严谨的 规范使调试过程复杂化，因为可能很难确定 特定的内部块是错误的，或者它只是与在预硅中观察到的响应不同 模拟。虽然大型芯片越来越多地使用AMS模块，但模拟电路本身 正变得越来越数字化。设计师们经常使用“数字辅助技术”来应对 先进的cmos工艺中器件的模拟性能的缺点，通过增加 带有数字块的模拟电路，或在可能的情况下，通过替换它们。例如，传统的锁相 环路(PLL)正在让位于具有最少数量的模拟块的主要数字设计， 即可控振荡器，以限制器件变化性对电路的影响。此外， 反馈控制回路在模拟设计中普遍存在，以补偿工艺参数、电源 电压、温度(PVT)变化、调节时序偏差、实现温度调节等 控制回路几乎总是使用数字硬件或在嵌入式系统上运行的软件实现 微控制器。从这个角度来看，大多数AMS设计都由几个嵌入数字的模拟模块组成 控制回路。我们观察到，这些控制回路大多基于简单的控制器设计，例如 比例积分(PI)控制器。同样，我们观察到大多数模拟块具有简单的响应， 当在适当的域中查看时。通过将AMS电路视为嵌入在数字中的模拟块 控制器，本研究的目的是获得AMS电路的通用结构(重点是 PLL)，可用于硅前验证和硅后调试和验证。我们提出了各种 AMS集成电路的设计、验证和测试技术，并确认 采用先进的cmos工艺实现的概念验证原型集成电路的技术。