Design, verification, and test of analog and mixed-signal integrated circuits with an emphasis on PLLs

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Analog and mixed-signal (AMS) integrated circuits present post-silicon (post-Si) validation challenges because of the inherent limited controllability and observability of internal signals. Furthermore, the lack of rigorous specifications complicates the debug process because it can be difficult to determine if the response of a particular internal block is wrong or if it is only different than the responses that were observed in pre-Si simulations. While large chips are making more and more use of AMS blocks, the analog circuits themselves are becoming increasingly digital. Designers frequently use "digitally assisted techniques" to cope with the shortcomings of analog performance of the devices in advanced CMOS technologies by either augmenting the analog circuits with digital blocks or, when possible, by replacing them. For example, traditional phase-locked loops (PLLs) are giving way to predominantly digital designs with a minimum number of analog blocks, namely, the controllable oscillator, to limit the impact of device variability on the circuit. Furthermore, feedback control loops are ubiquitous in analog designs to compensate for process parameter, power supply voltage, and temperature (PVT) variations, adjust timing deskew, implement temperature regulation, etc. These control loops are almost always implemented using digital hardware or with software running on an embedded microcontroller. From this perspective, most AMS designs consist of a few analog blocks embedded in digital control loops. We observe that most of these control loops are based on simple controller designs such as proportional-integral (PI) controllers. Likewise, we observe that most analog blocks have simple responses, when viewed in the appropriate domains. By viewing AMS circuits as analog blocks embedded in digital controllers, the objective of this research is to obtain a generic structure for AMS circuits (with an emphasis on PLLs) that can be leveraged for pre-Si verification and post-Si debug and validation. We propose various techniques for design, verification, and test of AMS integrated circuits and confirm the validity of the techniques using proof-of-concept prototype integrated circuits implemented in advanced CMOS technologies.