ML-Based Techniques for Physical Design Automation of SoCs

半导体和由其制成的集成电路无处不在，并继续渗透到我们经济的所有部门、所有人造和自然环境、地球仪和外层空间。利用最先进的制造技术构建的IC包含数十亿个电子器件（晶体管），这些电子器件通过无数错综复杂的导电和非导电材料层和条（线）互连在一起。 完成设计和验证这样的互连网络的正确性提出了艰巨的挑战。 这些挑战部分通过复杂的计算机辅助设计（CAD）或电子设计自动化（EDA）工具的帮助来克服。反过来，这些工具相当于全球集成电路设计师团队使用的大量高度复杂的软件包。 当今集成电路的复杂程度以及近期和长期设想的复杂程度使得EDA工具虽然能够提供宝贵的帮助，但由于手头问题的计算复杂性往往非常大，因此产生可行的解决方案往往非常缓慢。 这项研究的重点是开发新的方法，旨在显着加快集成电路设计阶段，通常被称为物理IC设计，更具体地说是“布局和布线”。 我们建议开发一个新的框架，利用人工智能，特别是机器学习技术，以加速和提高布局和布线EDA工具的质量。我们所追求的改进和加速将使IC设计人员能够更快地致力于更好的设计。总的来说，这为在更短的时间内以更低的成本生产更高性能的IC铺平了道路。许多加拿大和跨国公司和组织都在为各个行业的应用开发集成电路。我们的研究成果将直接使这些公司受益。 许多其他组织，包括加拿大和在加拿大经营的跨国公司，其业务直接或间接依赖于IC。这些组织也将间接受益于本报告所建议的工作成果。

Semiconductors and the integrated circuits (ICs) made from them are ubiquitous and continue to penetrate all sectors of our economies, all built and natural environments, the globe, and outer space. ICs built with state of the art manufacturing technologies contain billions of electronic devices (transistors) interconnected together through myriads of intricate and complex layers and strips (wires) of conducting and non-conducting materials. Completing the design and verifying the correctness of such an interconnection network presents formidable challenges. These challenges are partly overcome through the aid of sophisticated computer-aided design (CAD) or electronic design automation (EDA) tools. These tools, in turn, amount to massive, highly complex software packages used by teams of integrated circuit designers worldwide. The level of complexity of the integrated circuits of today and those envisioned in the near and longer term is such that the EDA tools, while able to provide invaluable aid, tend to be very slow to yield viable solutions as the computational complexity of the problem at hand tends to be extremely large. This research is focused on developing novel methodologies aimed at significantly accelerating the phases of integrated circuit design commonly referred to as physical IC design and more specifically as "place and route". We propose to develop a new framework that draws on artificial intelligence, and, in particular, machine learning techniques, to accelerate and improve the quality of place and route EDA tools. The improvements and acceleration we aim for will allow IC designers' efforts to converge on better designs faster. Overall, this paves the way to the production of higher performance ICs in lesser time and at reduced cost. Many Canadian and multi-national companies and organizations are in the business of developing ICs for applications in various sectors. Our research outcomes would directly benefit such companies. Many other organizations, Canadian and multi-national operating in Canada, have their businesses directly or indirectly dependent on ICs. These organizations will also benefit, albeit indirectly, from the results of the work proposed here.