面向多核处理器应用的三维电感耦合互连通道模型及其3D NoC结构研究

本项目基于电感耦合无线互连技术，以提高多核处理器系统存储带宽，缓解"存储墙"为目的，将首先建立准确的三维电感耦合互连通道模型，并搭建验证平台；然后基于此通道模型，深入研究适合电感耦合互连技术的3D NoC体系结构，拟提出一种新颖的混合型3D NoC网络结构：片间垂直网络拟采用环网结构，片上水平网络拟实现一种具有广播和置换功能的BP-Mesh 网络结构，在获得高效片上通信的同时，便于进行灵活扩展；最后基于该3D NoC网络结构，深入研究相应的通信机制及其低功耗休眠策略和垂直气泡流控法，在系统性能、可靠性和功耗开销之间实现平衡，充分发挥电感耦合互连技术所具有的工艺兼容、成本低、通信速度快、总线位宽大、扩展灵活等优势。本项目将在基于电感耦合无线互连的通道模型、3D NoC网络结构等核心技术方面取得突破，形成相关的创新技术体系，为我国高效能多核处理器系统的研制，奠定坚实的理论和技术基础。

For relieving the problem of "storage wall" in the processor system. First,the 3D inductive coupling channel model will be established in this project,through software simulation and experimental platform based on multi-core processors；Then,based on this model,aiming for multi-core processor applications, a novel hybrid 3D NoC architecture and its corresponding low power sleep controlling strategies and vertical bubble flow algorithm will be achieved，to maintain the best balance between system performance,reliability and power　overhead. The vertical inter-chips network adopts a ring structure,while the horizontal intra-chip network adopts a novel BP-Mesh network structure with broadcast and permutating function, to reduce the power consumption and design complexity effectively, making full use of the advantages of the 3D inductive coupling interconnect technology such as process compatibility, low costs, high communication speed, high bandwidth, flexible expansion and so on. Through this project, a theoretical foundation and breakthrough will be provided for high-performance three-dimensional stack system integration based on inductive coupling interconnect.The relevant innovative technology system will form a solid theoretical and technical foundation for implementing high cost-effective,high-performance and high output ratio computer system with independent intellectual property rights.