随着集成电路工艺特征尺寸步入纳米级，传统CMOS技术将遇到迁移率退化、功耗密度过高所带来的严峻挑战。高迁移率器件是应对这些挑战最重要的技术途径。在众多高迁移率器件中，Si/SiGe/SOI量子阱MOS器件是未来提升p-MOS器件空穴迁移率的有效方案之一。本项目针对Si/SiGe/SOI量子阱MOS器件中的原理性问题，对SiGe沟道载流子散射机理进行深入研究，考察声子散射、库仑散射、合金散射等散射机制对器件迁移率的影响，同时系统性研究SiGe层厚度、Ge组分、应力、表面硅层、栅介质等因素对载流子散射机制及迁移率的作用。通过本项目的研究，旨在深入全面地掌握Si/SiGe/SOI量子阱MOS器件载流子散射机理，为优化器件设计、控制散射机制提供理论依据，进一步发挥Si/SiGe/SOI量子阱MOS器件的高迁移率优势。

As the feature size of integrated circuit technology steps into nano-scale, tranditional CMOS technology will meet severe challenges resulting from mobility degradation and high power density. High mobility device is the most important method to address these challenges. Among all high mobility devices, Si/SiGe/SOI quantum-well MOS device is one of the most effective solution for high hole mobility p-MOS device. This study will focus on fundamental problems of Si/SiGe/SOI quantum-well MOS device. Carrier scattering mechanism in SiGe channel will be deeply studied and influence of scattering mechanism on carrier mobility, such as phonon scattering, Coulomb scattering and alloy scattering, will be investigated. Meanwhile, the effects of key parameters of the device on carrier scattering and mobility, including SiGe thickness, Ge concentration, strain, Si cap thickness and gate dielectric, will be systematically studied. Through this study, carrier scattering mechanism of Si/SiGe/SOI quantum-well MOS device will be more deeply and extensively understood, which provides theoretical supports for design optimization and scattering manipulation to further leverage high mobility advantage of Si/SiGe/SOI quantum-well MOS device.