硅基石墨烯光电探测器三维异质集成研究

围绕后摩尔时代新器件的挑战，突破硅基光电器件传统能效极限，实现高性能宽光谱探测是信息传感技术发展的关键。本项目拟开展基于高密度、低延迟CMOS三维集成互连工艺的石墨烯光电探测器研究。本项目在申请人前期提出硅基石墨烯电荷耦合器件(GCCD)和优化硅基石墨烯肖特基探测器(GPD)基础上，结合硅基CMOS隔离阱工艺，探究石墨烯像素间的有效隔离，实现阵列制备。基于这两类器件的特性，本项目将设计CMOS片上读出电路，优化相关双采样技术（CDS）及采样放大电路，实现低功耗、低噪声、高保真的信号读出。围绕大规模硅基器件后端兼容问题，本项目拟通过倒装焊及单片集成工艺，将高性能硅基石墨烯光电探测器与专用CMOS读出电路三维集成，实现宽光谱探测，同时充分发挥硅基技术的低成本、低噪声、宽动态范围等优势。该三维异质集成方案有助于突破传统硅基宽光谱探测器的能效极限,促进后摩尔时代变革型新器件与硅基CMOS集成发展。

Low cost, high performance, and wide spectral range are key pursuits for silicon-based information technology in the coming Post-Moore Era. In this proposal, by utilizing the three-dimensional(3D) high-density integration and low-latency interconnection technology, we explore the feasibility of integrating graphene-based photodetector into conventional CMOS-based fabrication lines. The studied detectors in this proposal include graphene-silicon photodetectors (GPD) and silicon-based graphene charge coupled devices (CCD). For the design of photodetector array, we plan to use the isolation well to reduce crosstalk between neighbor pixels. To realize low-power high-quality signals process, we plan to design the on-chip circuits based on the studied photodetectors, including readout, CDS (correlated double sampling) and amplification. To compatibly integrate the peripheral circuit with the graphene-silicon based photodetector array, we plan to adopt two kinds of integration technologies, the Flip-chip bonding process and the monolithic integration. Through effective 3D monolithic integration design, we try to simultaneously achieve wide spectral response and high fill factor, while fully exploit the superior properties of silicon-based technology such as low cost, low noise, and large dynamic range. This proposed CMOS compatible 3D hetero-integration design offers unprecedented opportunities for breaking the limits of silicon-based photodetectors,promotes the integrated development of revolutionary new devices and silicon-based CMOS in the post-Moore era.