当前暗物质和中微子探测等地下低本底实验的开展使得低温辐射探测器比如高纯锗、液氙等探测器技术的发展备受关注。为了降低噪声，探测器前端电路通常也必须工作在低温下。为了满足探测器规模日益扩大、读出电路通道数不断增加的需求，本项目将开展基于商用CMOS集成电路的低温辐射探测器前端电路的设计研究，主要研究可用于77K低温下CMOS前端电路的关键设计技术，包括低温MOS晶体管的噪声特性、低温CMOS电荷灵敏前放的噪声优化以及用于点电极高纯锗探测器读出的前端电路研制，在低温下达到10个电子的噪声水平。这项研究将推动我国高纯锗等低温辐射探测器技术的发展以及它们在低本底实验中的应用。

Recently low temperature radiation detectors e.g. HPGe detectors are rapidly developed for dark matter search and neutrino experiments carried out in underground laboratories. In order to reduce the noise level, the front-end electronics usually work at low temperature as well. The channel number of the readout electronics increases as the detector mass keeps scaling up. Low temperature front-end electronics for radiation detectors based on commercial CMOS integrated circuit processes will be developed in this project. Design techniques of CMOS front-end electronics at 77K will be mainly carried out, including noise characterization of MOS transistor at low temperature, noise optimization method for low temperature CMOS preamplifier and developing front-end electronics for point-contact HPGe detectors, with about 10 electrons in ENC.