单层/少层二碲化钼（MoTe2）纳米片晶体管器件中的界面调控研究

单层/少层过渡金属硫化物(TMDs)纳米片是后摩尔定律时代理想的非硅基纳电子器件沟道材料，但是普遍存在载流子迁移率偏低的难题。解决这一科学问题的关键在于调控栅介质/TMDs纳米片界面，阐明散射机制对载流子迁移率的影响。本项目以具有极大非硅基纳电子器件应用潜力的较新颖单层/少层二碲化钼（MoTe2）纳米片为研究对象，拟研究直接构建栅介质/MoTe2纳米片堆栈结构，通过优化栅介质沉积工艺，促进栅介质/ MoTe2的共形生长，调控栅介质/MoTe2界面。此外，提出利用多靶磁控共溅射制备极薄钝化层后进行热处理的界面调控新思路，构建栅介质/界面钝化层/MoTe2纳米片堆栈结构，降低界面电荷陷阱密度，提高载流子迁移率。本课题的实施将为阐明单层/少层MoTe2纳米片晶体管器件中载流子散射机制对迁移率的影响，制备高性能单层/少层MoTe2纳米片基纳电子器件提供理论与实验依据。

Mono-layered/few-layered transition metal dichalcogenides (TMDs) nanosheets are ideal channel materials for the silicon beyond nanoelectronics. However, the carrier mobility for such TMDs nanosheets-based devices is generally seriously limited to be below the theoretical value. To solve this problem, it is crucial to engineer the interface between high-k dielectrics and semiconducting TMDs nanosheets, and clarify the mechanism of carrier scattering sources on the mobility. This project focuses on the interface control between high-k dielectrics and mono-layered /few-layered Molybdenum telluride (MoTe2) nanosheets, which show good potential as channel materials for the future silicon beyond nanoelectronics. We will investigate the deposition process of high-k dielectrics onto the surface of MoTe2 nanosheets, aiming to promote the conformal growth thus the control of interfacial quality. Meanwhile, we proposed to construct high-k dielectrics/passivation layer/ MoTe2 nanosheets gate stacks, by inserting an ultrathin interfacial passivation layer via a co-sputtering followed by post-thermal treatment method, to improve the interfacial quality with low density of interface traps. This study will provide an insight into the mechanism of carrier scattering sources on the mobility, facilitating the fabrication of high performance mono-layered/few-layered MoTe2 nanosheets-based devices.