An Expert System for Layout Generation

本文研究的是一个布局专家系统原型 在一个分层的VLSI系统中产生。 它适用于 结合基于规则和基于算法的技术， 新的布局样式。在一组简单基准上进行的初始测试 已经证明了这个专家系统的优越性， 各种标准单元系统及其 与人类设计师在布局方面的竞争力 质量. 进一步的研究旨在了解其全部潜力 并开发一种新的设计方法， 取代标准单元设计方法。 具体的研究主要在四个方面：（1）改编原型 系统，以便它可以使用用户定义的晶体管尺寸， 门在输入描述;（2）修改的战略， 知识表示，以便将规则划分为 更小的集合，并研究集合中的规则类型 作为集合的粒度和它们被 （3）研究象征意义的翻译问题， 利用知识局部重构的几何表示 电路功能和全局平面图;以及（4） 收集一组广泛的基准来比较布局 产生的不同系统，并制定比较的方法 布局质量。

The research is on a prototype expert system for layout generation in a hierarchial VLSI system. It applies a combination of rule-based and algorithmic-based techniques to a new layout style. Initial tests on a set of simple benchmarks have demonstrated the superiority of this expert system over various standard cell systems and its competitiveness with the human designer in terms of layout quality. Further research seeks to understand the full potential of this idea and develop a new design methodology that may replace the standard-cell design method. Specific research is in four areas: (1) adapt the prototype system so that it can use user-defined sizes of transistors and gates in the input description; (2) revise the strategy of knowledge representation so as to permit rules to be divided into smaller sets, and investigate the types of rules in a set as well as the granularity of the sets and the order in which they are applied; (3) study the problem of translation of symbolic to geometric representation with local restructuring using knowledge of the circuit functionality and the global floor plan; and (4) collect an extensive set of benchmarks for comparing layouts generated by different systems, and develop methods of comparison of layout quality.