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The Impact of Architectural Features on the Performance of Parallel Algorithms

The Impact of Architectural Features on the Performance of Parallel Algorithms
架构特征对并行算法性能的影响
批准号:
9200005
负责人:
Umakishore Ramachandran
金额:
$25.49万
依托单位国家:
美国
项目类别:
Continuing Grant
财政年份:
1992
资助国家:
美国
项目状态:
已结题
起止时间:
1992-06-15 至 1996-11-30

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中文摘要
翻译
Ramachandran研究的主要目的是研究并行算法和体系结构之间的相互关系。其目的是了解在现实的并行体系结构上高效实现并行算法的障碍。这项研究涉及研究体系结构问题,如延迟、网络竞争、粒度、同步和通信对并行算法性能的影响。要采取的方法是识别大规模科学/工程应用中频繁出现的并行内核;在SIMD和MIMD两种类型的目标体系结构上使用这些内核进行实验;并通过模拟研究来增加实验工作,以推断未来并行体系结构的结果。输入/输出特征对这种并行核性能的影响也在研究中。
英文摘要
Ramachandran The main thrust of the research is to study the inter- relationship between parallel algorithms and architectures. The objective is to understand the impediments to the efficient implementation of parallel algorithms on realistic parallel architectures. This research involves studying the impact of architectural issues such as latency, network contention, granularity, synchronization, and communication on the performance of parallel algorithms. The approach to be taken is to identify frequently occurring parallel kernels in large-scale scientific/engineering applications; experiment with these kernels on target architectures of both SIMD and MIMD varieties; and augment the experimental work with simulation studies to extrapolate the results for future parallel architectures. The effects of input/output features on the performance of such parallel kernels are also being studied.
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