A Transformational Programming Environment for Hardware Specifications

这项研究是在测试转换方法的可行性，以前只用于软件生产力的提高，在硬件规范和综合的背景下。该研究涉及硬件规范和综合语言的转换环境的设计和实现。该环境支持类似vhdl的规范、这些规范的符号分析以及保持源到源转换的正确性。目前正在进行两项申请。第一部分着重于自动硬件设计，将算法级硬件规范转换为寄存器传输级实现。第二个应用程序通过使用时间逻辑子集的自动线性时间模型检查来处理硬件验证。

Paige This research is on testing the feasibility of a transformational methodology, previously used only for software productivity improvement, within the context of hardware specification and synthesis. The research involves the designing and implementing a transformational environment for a hardware specification and synthesis language. This environment supports VHDL-like specifications, symbolic analysis of these specifications, and correctness preserving source-to-source transformations. Two applications are being carried out. The first emphasizes automatic hardware design in which the system is used to transform algorithmic level hardware specifications into register transfer level implementations. The second application deals with hardware verification by automatic linear time model checking using a subset of temporal logic.